Here, we will highlight the general challenge for integrating dielectrics on β-Ga₂O₃, address the associated requirements for obtaining high-quality dielectric and dielectric/β-Ga₂O₃ interface, and present our recent works on the integration of Al₂O₃and SiO₂ dielectrics on (010) β-Ga₂O₃ [1]. We will show how surface roughness can play key role in controlling interface defect density in β-Ga₂O₃ MOS capacitors. We will also discuss the role of surface cleanliness (using, for example, piranha treatment), the removal of surface defective layer using HF, and the role of post-deposition annealing in reducing interface defect density [2]. Finally, we will compare the thermal stability of SiO₂ and Al₂O₃deposited on (010) β-Ga₂O₃ substrates [3]. All these considerations will eventually allow electronic-grade integration of dielectrics on β-Ga₂O₃substrates needed to attain high breakdown voltage in power electronics applications and also to attain low AC-DC dispersion and high operating frequency in RF applications.

[1] Islam et al., "Integration challenges for dielectric on β-Ga₂O₃ and their solutions," Proc. of GOMACTech, 2022, P31.

[2] Islam et al., "Hysteresis-free MOSCAP made with Al₂O₃/(010)β-Ga₂O₃ interface using a combination of surface cleaning, etching and post-deposition annealing," Proc. of DRC, 2021, p. 9467169.

[3] Islam et al., "Thermal stability of ALD-grown SiO₂ and Al₂O₃ on (010) β-Ga₂O₃ substrates," Accepted, DRC, 2022.

Ga₂O₃ is a promising candidate for power electronics and RF applications, whereas a fundamental limitation of Ga₂O₃ is its low thermal conductivity (k_T). This work studies the impact of the packaging process on Ga₂O₃ device characteristics and measures the junction-to-case thermal resistance (R_θJC) of a 15 A double-side-packaged vertical Ga₂O₃ Schottky barrier diode (SBD) under the bottom-side-cooling and junction-side-cooling schemes.

Fig. 1. shows the schematic and photo of the packaged Ga₂O₃ SBD, device fabrication process [1], and the device structure. 100-nm Ti and 200-nm Ag were deposited on both anode and cathode as the contact layer for silver sintering. Besides serving as an adhesion layer, Ti also functions as a barrier layer to prevent Ag diffusion into Schottky metal in the subsequent sintering process.

Die attach is performed using a pressureless sintering process in air, using a nano-silver paste. The paste is stencil-printed through a 70 µm thick, laser-cut mask. The size of the silver print is increased from 2.5×2.5 mm², the size of the mask opening, to about 3×3 mm². Once sintered, the assembly is encapsulated in a silicone elastomer for isolation. Fig. 2 summarizes the packaging process.

Fig. 3 shows the forward I-V, reverse C-V and I-V characteristics of the packaged Ga₂O₃ SBD, revealing a turn-on voltage V_on of 0.9 V, a forward current of 15 A at 2.15 V, an on/off ratio of 10¹⁰ extracted at 2 V/0 V, and a breakdown voltage of about 600 V.

Fig. 4 shows the I-V characteristics of the Ga₂O₃ SBD before and after packaging. After packaging, the V_on increases, the differential on-resistance reduces, and both forward and reverse leakage current decreases. These shifts are believed to be due to the improvement of the Schottky contact after the 250^oC sintering process.

The R_θJC measurement is detailed in [2], following the transient dual interface method, i.e., JEDEC 51-14 standard. Fig. 5 shows our R_θJC measurement set-up, the bottom- and junction-cooling measurements of the same packaged Ga₂O₃ SBD. Fig. 6 shows a much lower R_θJC (0.5 K/W) under junction-side cooling as compared to the R_θJC (1.43 K/W) under the bottom-side cooling.

Table I benchmarks the R_θJC of our Ga₂O₃ SBDs against commercial 600-V SiC SBDs with a similar current rating and different TO-series packages. The R_θJC of our junction-side cooled Ga₂O₃ SBD is lower than that of the commercial SiC SBDs with similar package size and current rating. This shows the low k_T of Ga₂O₃ can be overcome by packaging solutions.

[1] APL, vol. 115, no. 26, p. 263503, 2019.

[2] IEEE EDL, vol. 42, no. 8, pp. 1132-1135, 2021.

We report on the growth and characterization of in-situ Al₂O₃ on (010) β-Ga₂O₃ using metalorganic chemical vapor deposition (MOCVD). The in-situ Al₂O₃ deposition provides an in-situ passivation to the underlying epitaxial β-Ga₂O₃ layer and protects the semiconductor surface from undesired contaminants. The MOCVD growth of Al₂O₃ also facilitates high temperature dielectric deposition compared other conventional techniques, which is known to enhance the bulk and interface quality of the dielectric. The growth of β-Ga₂O₃ was performed in an Agnitron MOVPE reactor with far injection showerhead design using Triethylgallium and Oxygen as precursor gas at a growth temperature of 600 ⁰C, which is followed by the growth of Al₂O₃ layer at the growth temperature of 810 ⁰C inside the same chamber using Trimethylaluminum and O₂ as precursors without breaking the vacuum. Thickness of the grown Al₂O₃ layer was extracted to be 23 nm using Xray reflectivity measurements. Using capacitance voltage (CV) measurements, the dielectric constant of the Al₂O₃ layer was extracted to be ~8. The fast and slow near interface traps at the in-situ Al₂O₃/ β-Ga₂O₃ interface were characterized using stressed CV measurements on metal oxide semiconductor capacitor (MOSCAP) structures. The sheet density of near interface trap states with fast and slow emission times were also calculated to be 8.3 x 10¹¹ cm^-2 and 1.5 x 10¹¹ cm^-2 respectively. The density of the interface states (initially filled and unfilled) and bulk oxide hole traps (D_t) and their energy dependences were calculated to be 5.4 x 10¹¹ cm^-2 eV^-1 using deep ultra-violet assisted CV technique, which is significantly lower than the ALD Al₂O₃/β-Ga₂O₃ interface from literature. Furthermore, the breakdown voltage and leakage currents for the in-situ Al₂O₃/β-Ga₂O₃ MOSCAPs were evaluated using forward and reverse IV characteristics. In the accumulation regime with forward bias, the entire electric field drops across the oxide layer. An average peak breakdown field of approximately 10.2 to 10.6 MV/cm underneath the center of the anode is evaluated. High breakdown field in combination with a dielectric constant close to β-Ga₂O₃, makes this an excellent dielectric/semiconductor platform for high performance device applications. This approach of in-situ dielectric deposition on β-Ga₂O₃ can pave the way as gate dielectrics for future β-Ga₂O₃ based high performance MOSFETs due to its promise of improved interface and bulk quality compared to other conventional dielectric deposition techniques. We acknowledge funding from AFOSR MURI program under Award No. FA9550-21-0078 (PM: Dr. Ali Sayir).

β-Ga₂O₃ has emerged interest in high-power electronics due to its high breakdown field (8 MV/cm) and melt-grown substrates. To extract the full potential of β-Ga₂O₃ devices, high reverse blocking capability and field management are fundamental requirements. However, this is challenging in β-Ga₂O₃ due to absence of its p-type that limits high barrier formation in critical field regions. Hence, to enhance the β-Ga₂O₃ diode performance, it is important to have high Schottky barrier material at surface as well as efficient field-plate dielectric. Toward this goal, we developed metal oxide (PtO_x) Schottky contact with high-κ dielectric (ZrO₂) field plate in vertical β-Ga₂O₃ devices to support high electric field at both surfaces and edges. Vertical field-plate Schottky diodes were fabricated at UCSB with HVPE (001) 10 µm β-Ga₂O₃ epitaxy (doping ~2×10¹⁶ cm^-3). The devices had Ti/Au ohmic and Pt cap/PtO_x Schottky of 100 µm diameter. The PtO_x was formed by reactive sputtering of Pt and oxygen. The field plates were investigated with different lengths, 15 µm and 30 µm, with sputter deposited dielectric ZrO₂ (~215 nm). The ZrO₂ was chosen for its ~1.2 eV conduction band offset with β-Ga₂O₃, breakdown field >3 MV/cm, and dielectric constant of ~23. The PtO_x Schottky properties were first characterized with current-voltage (I-V) and capacitance-voltage (C-V), and compared with that of Pt/β-Ga₂O₃ from the same HVPE β-Ga₂O₃ sample. The PtO_x Schottky had a significantly higher barrier height of ~2.1 eV from both I-V and C-V compared to that of Pt with 1.35 eV (I-V)/ 1.6 eV (C-V). The similar barrier height for PtO_x from I-V and C-V indicates its homogeneous interface. The forward current of the field-plate PtO_x diodes also showed near unity ideality factor (1.17) and on-off ratio of ~10¹¹. The minimum specific on-resistance of the PtO_x diodes was 2.6, 2.36, and 2.3 mΩ-cm² for devices without field plate, with field plate lengths of 15 µm, and 30 µm respectively. The reverse breakdown of the diodes was characterized at the Univ. of Utah. A maximum breakdown voltage (V_br) of 947 V was obtained with 30 µm field plate whereas the diode with 15µm field plate and without field plate showed V_br of 882 V and 520 V, respectively. The consistent increase of V_br with field plates indicates their field management efficacy. SILVACO simulation showed a peak electric field of 5.12 MV/cm in β-Ga₂O₃ and 3.5 MV/cm in ZrO₂ at V_br ~950V. The BFOM (0.4 GW/cm²) of our diodes is comparable or better than most of the reports. As the ZrO₂ breakdown limited to reach the full potential of β-Ga₂O₃, future work will include high breakdown dielectric to further improve the device performance.

β-Ga₂O₃ (BGO) is an ultra-wide bandgap (~4.8 eV) semiconductor with disruptive potential for power electronics due to its predicted breakdown field of 8 MV/cm, ease of n-type doping, and availability of melt-grown native substrates. With no p-type doping, Schottky barriers are essential to limit reverse leakage current in rectifying BGO devices. However, reverse leakage current due to thermionic field emission in such devices exceeds the practical limit of 1 mA/cm² at surface fields (ℰ_surf) <5 MV/cm for barrier heights <2.2 eV, limiting the potential benefits of BGO. It is desirable to find a solution for reducing leakage current in diodes without efficiency losses from increased turn-on voltage (V_on) or specific on-resistance (R_on,sp). TiO₂ is a high κ (~60) dielectric with a conduction band edge ~0.3 eV lower than BGO, presenting the potential for use in metal-interlayer (MIS) diodes to provide a wider tunneling barrier with no increased barrier height for forward conduction.

Pt/TiO₂/β-Ga₂O₃ MIS diodes and Schottky barrier diodes (SBDs) with and without field plates were fabricated on ~5 μm, 6x10¹⁶ cm^-3 (001) HVPE BGO on an n+ BGO substrate. A back side Ti/Au contact was RTA annealed at 470 °C for 60 s in N₂ ambient. TiO₂ (4.5 nm) was deposited by atomic layer deposition and removed with BOE in areas for SBDs. Pt/Au anode contacts were deposited, followed by 200 nm PECVD SiO₂ and Ti/Au field plate metal with 20 μm overhang.

Forward current-voltage (I-V) behavior was measured for all device types. An ideality factor of 1.08 and 1.09 was fitted for SBDs and MIS diodes respectively. The minimum differential R_on,sp­ was ≤1.2 mΩ∙cm² in all devices, and V_on extrapolated from the linear I-V was similar between the SBDs and MIS diodes at 1.4 V.