ALD/ALE 2025 Session AA-TuA: 3D Semiconductor Devices

This study aims to address the availability of Atomic Layer Deposited InGaZnO (ALD IGZO) as the stackable channel for the application in DRAM (Dynaic Ramdom Access Memory) cell.

The memory industry has grown significantly in response to the changes in the computing environment following the personal computer to artificial inteligence

(AI) era. The need for data creation, storage and processing will increase exponentially with the expansion of AI computing, much more rapidly than the traditional amount of data increase. As DRAM physically arrives at sub ten nanometer scale, the issues been more serious in many aspects, such as patterning for high aspect ratio structure, high-k material innovation as capacitor dielectric, resistance of gate material and so on.

The conversion to new platform is one of promising candidates to overcome current physical limits of DRAM and new channel material is a key component to realize new DRAM platform. IGZO is one of promising candidates as new channel material for DRAM cell transistors.

After physical properties of PVD IGZO related to electrical properties are investigated as the reference, those of ALD IGZO will be compared and then, hydrogen effect from precursor and integration will be presented.

As Si channel scaling continues, highly complex 3D transistor architectures, such as complementary FETs (CFETs) and vertical FETs, are emerging. Alternative channel materials, such as two-dimensional transition metal dichalcogenides (2D TMDs) and indium gallium zinc oxide (IGZO) semiconductors, have garnered significant attention as potential replacements for conventional Si channel layers.However, these alternative materials must meet extremely challenging requirements, including high effective field mobility, high drive current, and a large on/off current ratio, while enabling 3D structure Si device compatible process and ensuring channel thickness scalability down to sub-5 nm. Among the promising candidates, indium nitride (InN) stands out due to its high electron mobility (~3,600 cm²/V·s), peak electron velocity exceeding 2 × 10⁸ cm/s, and an appropriate bandgap greater than 0.75 eV [1,2].

Despite its potential, there are limited reports on InN-based transistors fabricated by atomic layer deposition (ALD), likely due to the challenges associated with growing sub-10 nm thick films with reliable electrical characteristics at low deposition temperatures. These difficulties stem from the low reactivity of In precursors with NH₃, relatively weak In-N binding energy, contamination from carbon and hydrogen, and challenges in achieving conformal deposition. Additionally, while InN films thicker than 10 nm typically exhibit metallic behavior due to high electron concentration, ultra-thin InN layers are expected to exhibit semiconductor properties.

In this presentation, we report the deposition of sub-5 nm conformal InN films using Hollow-Cathode Plasma (HCP)-enhanced ALD and evaluate their performance in back-gated thin-film transistor (TFT) devices. We examine the impact of process conditions—including plasma power, working pressure, and deposition temperature—on film characteristics. InN layers were deposited at 280°C on a 15 nm–100 nm SiO₂ back-gate dielectric atop a Si substrate. After defining the TFT channel, source/drain contacts were patterned.We presented InN TFT results, including transfer and output characteristics, temperature dependence, and channel length scaling. Our findings demonstrate that InN-based TFTs with a 4 µm channel length achieve an on-current of ~50 µA/µm, an I_on/I_off ratio exceeding 10⁶, and a field-effect mobility of ~10 cm²/V·s at V_D = 5 V.

This work was supported by SK hynix Inc. M. G. Jo. acknowledges IITP-(2025)-RS-2023-00253914 grant funded by the Korea government (MSIT).

[1] Imran, A., et al. Adv.Mater.Interfaces 10, 2200105 (2022).

As devices continue to scale down to <2nm node, chip suppliers recently started replacing current metals (e.g., copper) with alternative metals due to reduction in current-carrying cross-section, increase in electron scattering, and integration challenges in narrow features. While cobalt (Co) and ruthenium (Ru) are attractive options for resistivity scaling and as middle-of-the-line (MOL) interconnect materials, they require the use of liners and are not amenable to downstream CMP processing. Selective (i.e., bottom-up) molybdenum (Mo) deposition represents a transformative approach to addressing the challenges of void-free filling in high-aspect-ratio structures for semiconductor manufacturing. Mo is a promising alternative to tungsten (W) in MoL applications where the CD of the via is below 15nm. However, achieving large grain Mo growth in complex geometries requires precise control over the deposition process and the use of a well-suited precursor.

This work focuses on MoO_aX_b(L), a family of key precursors due to their unique ability to modulate between etching properties, selective deposition, or conformal deposition, depending on process design & substrate. Because some substrates do not lend themselves well to selective Mo deposition, we developed superconformal Mo deposition strategies so that we could achieve large-grain growth on any substrates and structures.

The proposed void-free Mo fill approaches take two different paths to achieve the same goal:

1. Selective Mo Deposition: Where the Mo inherits its selectivity from the substrate. Highly selective for certain applications but limited by substrate architectures.

2. Superconformal Mo Deposition: Where the bottom-up growth is controlled by the deposition kinetics and is derived from a conformal process. This can be tuned to fill any via or trench over a wide range of aspect ratios and is independent of the material at the bottom of the feature.

Extensive characterization using advanced microscopy techniques, including PED, TEM and EDX, confirms the deposited Mo films’ superior quality, showcasing excellent conformality and absence of seam voids, even in features with reentrant profiles. These findings address many of the grand challenges for low resistance interconnects. The insights presented provide critical guidance for future material innovations and process optimization in semiconductor manufacturing.

Keywords: Bottom-up Mo fill, MoO_aX_b(L), selective deposition, ALD, semiconductor manufacturing

As dynamic random access memory (DRAM) capacitors continue to downscale, the demand for new electrode materials to improve device performance has increased. Titanium nitride (TiN), a conventional electrode for DRAM capacitors, is approaching its limits due to its low work function and chemical instability at the interface. To overcome these limitations, molybdenum dioxide (MoO₂) has emerged as a promising alternative, as it offers a high work function (>5 eV) that helps suppress leakage current and exhibits excellent stability at the interface with high-k dielectric materials. Notably, its structural similarity to rutile TiO₂ enables the low-temperature crystallization of high-k rutile TiO₂. However, the formation of monoclinic MoO₂ presents challenges, as it is a metastable phase with a higher formation energy than the stable MoO₃ phase. Although numerous studies have explored the fabrication of monoclinic MoO₂ films using a range of deposition methods, including pulsed laser deposition, reactive sputtering, and chemical vapor deposition, these techniques are unsuitable for DRAM capacitor fabrication due to the requirement for conformal growth on a three-dimensional substrate with an exceptionally high aspect ratio.

In this study, a simple thermal atomic layer deposition (ALD) process was developed to grow monoclinic MoO₂ films. It was found that the metastable MoO₂ phase was stabilized by SnO_x incorporation in MoO_x due to the template effect between SnO₂ and MoO₂. The electrical conductivity, surface morphology, and thermal stability of ALD SnO_x-incorporated MoO_x (TMO) films, as well as their interfacial properties with TiO₂ dielectrics, were evaluated to assess their potential as electrodes in TiO₂-based metal−insulator−metal (MIM) capacitors. ALD TiO₂ films grown on TMO exhibited remarkably suppressed leakage current and enhanced dielectric constants (>100), indicating that monoclinic ALD TMO facilitates the in situ crystallization of rutile TiO₂. These findings suggest that ALD TMO films are promising electrode materials for TiO₂-based MIM capacitors in advanced DRAM devices.

With the rapid development of artificial intelligence, the need to mimic biological functions has become increasingly important so as to perform complex tasks under complicated external environments. Memristors have emerged as an extremely competitive candidate for neuromorphic artificial electronic devices owing to their biological-like capabilities. It is urgent to develop new memristive materials and architecture to meet diverse demands in artificial intelligence and neuron network systems.

In this study, drew inspiration from neurotransmitters in the human brain, we selected essential amino acids cysteine (Cys) as organic precursor to construct biomimetic titanium-based cysteine hybrid films via molecular layer deposition (MLD). The stability of the hybrid films was extensively examined, demonstrating excellent durability in both water and air. A vertically integrated single-layer Pt/Ti-Cys/TiN device exhibits reproducible volatile switching behavior, with gradual changes observed during the set/reset process. Notably, the device successfully emulates bio-pain sensation and synapse functions, indicating that these biomimetic hybrid films hold great potential for the development of artificial sensory systems.

Oxide semiconductors have garnered interest as potential materials to address the issues caused by the scaling down of dynamic random-access memory devices.¹ However, high-temperature stability is a critical requirement for applying oxide semiconductors to memory devices.² To overcome the challenges of high-temperature instability in oxide semiconductors, it is essential to maintain a similar crystal structure regardless of the annealing temperature. Here, we proposed an optimized crystalline InGaO (IGO) film for high temperature stability by engineering atomic layer deposition process parameters, ozone concentration, and deposition temperature. Our results reveal that high-temperature stability can be secured by using elevated ozone concentrations and deposition temperatures in IGO deposition. Notably, IGO deposited at 300℃ shows little change in the main (222) intensity when annealed at 700℃ compared to 400℃, and a highly c-axis aligned (222) plane is observed. The field-effect transistor with an IGO active layer deposited at 300℃ showed minimal changes in electrical parameters after annealing at 700℃ (μ_FE: 58.4 to 68.7 cm²/Vs) and demonstrated excellent PBTS stability (ΔV_th: 0.15 V) at 3 MV/cm, 95℃. These outcomes suggest the possibility of utilizing oxide semiconductors in memory devices that require managing high-temperature thermal budgets.

References

1. Roy, Kauschick, Saibal Mukhopadhyay, and Hamid Mahmoodi-Meimand. "Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits." Proceedings of the IEEE 91.2 (2003): 305-327.

2. Schmitz, Jurriaan. "Low temperature thin films for next-generation microelectronics." Surface and coatings technology 343 (2018): 83-88.