AVS 67 Session LI-TuM2: Tuesday Morning Live Session II: Current and Emerging Devices

Memristive devices have become a promising candidate as the AI hardware core due to their attractive properties(1). AI algorithms can be implemented on a Resistive Neural Network (ResNN) with memristor synapses and neurons or a Capacitive Neural Network (CapNN) with memcapacitor synapses and neurons(2).

For ResNNs as computing accelerators, we have built a dot-product engine based on a 128 x 64 1T1R crossbar array(3)and a 3D crossbar array with 8 layers of memristors(4)using traditional non-volatile memristors. With such computation accelerators, we have demonstrated efficient inference and learning with traditional Machine Learning algorithms(5-7), which is expected to significantly improve the speed and energy efficiency of neural networks.

For ResNNs beyond accelerator applications, we developed diffusive memristors(8)with diffusion dynamics that is critical for neuromorphic functions. Based on the diffusive memristors, we have further developed artificial synapses(8)and neurons(9)to more faithfully emulate their bio-counterparts. We then integrated these artificial synapses and neurons into a small neural network, with which pattern classification and unsupervised learning have been demonstrated(9).

For CapNNs, we have developed pseudo-memcapacitive devices based on the diffusive memristors. Capacitive synapses and neurons enabled by these memcapacitive devices have been developed and used to form a fully integrated CapNN(10), which can implement spiking signal classification and Hebbian-like learning.

1. 1. Z. Wanget al., Resistive switching materials for information processing. Nature Reviews Materials 5, 173–195 (2020).
2. 2. Q. Xia, J. J. Yang, Memristive crossbar arrays for brain-inspired computing. Nature materials 18, 309-323 (2019).
3. 3. C. Liet al., Analogue signal and image processing with large memristor crossbars. Nature Electronics 1, 52 (2018).
4. 4. P. Linet al., Three-dimensional memristor circuits as complex neural networks. Nature Electronics 3, 225–232 (2020).
5. 5. Z. Wanget al., Reinforcement learning with analogue memristor arrays. Nature Electronics 2, 115 (2019).
6. 6. Z. Wanget al., In situ training of feed-forward and recurrent convolutional memristor networks. Nature Machine Intelligence 1, 434-442 (2019).
7. 7. C. Liet al., Long short-term memory networks in memristor crossbar arrays. Nature Machine Intelligence 1, 49-57 (2019).
8. 8. Z. Wanget al., Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing. Nature Materials 16, 101-108 (2017).
9. 9. Z. Wanget al., Fully memristive neural networks for pattern classification with unsupervised learning. Nature Electronics 1, 137-145 (2018).
10. 10. Z. Wanget al., Capacitive neural network with neuro-transistors. Nature Communications 9, 3208 (2018).

While delivering industry first demonstrations of 7NM (FinFET) and 5NM (Nanosheet) technology nodes, IBM Research has encountered unique challenges that arise as a result of continued device scaling. Dimensional compression drives higher aspect ratios, which in turn drive difficulty with in-feature ion, radical, and volatile species transport during plasma etch. Dimensional scaling now approaches the single digit nanometer scale, and the need for solutions to unique problems exists now more than ever. In the world of plasma etch, which largely led the charge in dimensional scaling with anisotropic patterning, it is now critical to account for a variety of factors to deliver a successful etch process. Etch process development is truly a juggling act of selectivity, anisotropy, by-product control, sidewall profile, and throughput. The continuation of device scaling using extreme ultraviolet light lithography, self aligned double and quadruple patterning, as well as the introduction of three dimensional (nanosheet) devices has introduced a unique set of challenges to be addressed in the coming technology nodes. In this paper, a variety of etch applications, challenges, and innovations will be reviewed with respect to continued device scaling. The functional implementation of quasi-atomic layer etching, plasma etch modulation of line edge/width roughness, and etch selectivity/anisotropy challenges at high aspect ratios will all be explored with the viewpoint of how these impact future semiconductor nodes.

Beta gallium oxide (β-Ga₂O₃) is an emerging ultra-wide bandgap (UWBG) semiconductor (E_g=4.5-4.9 eV). The crystal is outstanding in sustaining high electrical field because of its UWBG, making it attractive for power electronics, high-voltage/power radio frequency (RF), and harsh-environment applications [1]. Based on its UWBG, β-Ga₂O₃ crystal has an absorption edge around 275 nm, thus the material is intrinsically suitable for solar-blind ultraviolet (SBUV, λ<280 nm) detection [2]. In addition, thanks to the capability of growth from liquid phase, bulk β-Ga₂O₃ crystals can be cost-effectively synthesized with exceptional crystal quality. Furthermore, β-Ga₂O₃ possesses excellent Young’s modulus (E_Y=261 GPa) and speed of sound (c=6600 m/s), suitable for making mechanical devices. The outstanding ensemble of attributes in β-Ga₂O₃ enables new UWBG micro/nanoelectromechanical systems (M/NEMS) for future electromechanically coupled and tunable β-Ga₂O₃ electronic, optoelectronic, and physical sensing devices and systems.

Here we present an overview of the β-Ga₂O₃ mechanical properties characterization in nanomechanical device platforms and development of β-Ga₂O₃ resonant M/NEMS by describing the recent advances in engineering β-Ga₂O₃ nanostructures into functional devices and exploration of their device physics. We demonstrate a family of β-Ga₂O₃ NEMS resonators with resonance frequencies in high frequency and very high frequency (HF/VHF) bands and quality (Q) factors up to 1700 at room temperature. We extract Young’s modulus of 245–261 GPa for thin film β-Ga₂O₃ in the nanomechanical resonator platform [3]. In additional to basic nanomechanical devices, we demonstrate real-time SBUV light detection using oscillators enabled by β-Ga₂O₃ resonant NEMS [4]. We demonstrate β-Ga₂O₃ vibrating channel transistors (VCTs) for electromechanical coupling of the β-Ga₂O₃ M/NEMS resonators and depict the future design and equivalent-circuit modeling of such devices for >GHz operations [5]. We investigate the operation of β-Ga₂O₃ nanomechanical resonators in high temperature environment (up to 350 °C) and study its resonance frequency response under different pressures from atmospheric pressure down to ~15 mTorr. Our study facilitates the development and integration of β-Ga₂O₃ resonant M/NEMS on-chip with β-Ga₂O₃ electronic circuits, supplementing the rapidly emerging β-Ga₂O₃ electronics and optoelectronics.

References

[1] M. Higashiwaki, et al., Semicond. Sci. Technol. 31, 034001 (2016).

[2] W.-Y. Kong, et al., Adv. Mater. 28, 10725 (2016).

[3] X.-Q. Zheng, et al., ACS Appl. Mater. Interfaces 9, 43090 (2017).

[4] X.-Q. Zheng, et al., IEEE Electron Device Lett. 39, 1230 (2018).

[5] X.-Q. Zheng, et al., Appl. Phys. Lett. 117, 243504 (2020).

As logic metal pitch keeps scaling aggressively, back end of line (BEOL) interconnects continue to push the limits of materials properties and integrations. Current extreme ultraviolet (EUV) single exposure limitation (28P) requires a new robust patterning scheme based on EUV multipatterning and new metallization integrations will likely be required due to the lack of liner/barrier and copper scaling at such small critical dimensions ^{[1, 2]}.Alternative subtractive metallization scheme are being studied for very advanced node where resistance/capacitance (R/C) simulations shows benefit ^[1].

A key integration choice to make is whether to extend Damascene dielectric etch or move to subtractive metal etch. For Damascene dielectric, the key challenges are mask pattern assembly and EPE control, low k dielectric line wiggling and damage post etch, and liner/barrier induced high resistance after metallization ^{[3, 4]}. Subtractive metal etch presents cost issues, alignment concerns and will likely be implemented solely in first metal level(s) which have the most aggressive pitch scaling targets ^[3]. In terms of mask assembly, multipatterning is required to form line with a 3 masks level forSADP / cut / block and a 2 color Via mask (DPSAV) to meet design rules ^[4].

In this report, we present an in-depth study of the feasibility of Dual Damascene extension based on 24nm metal pitch. EUV self-aligned double patterning (SADP) is demonstrated for line and space patterning. With a cut and block flow, it enables an e-testable trench module. We demonstrate double patterned self-aligned via (DPSAV) for via tests. Dielectric reactive ion etch (RIE), including quasi atomic layer etch (QALE) and reduced low k damage etch, is leveraged for the trench and via formation, respectively. Finally, metallization and chemical mechanical planarization (CMP) is successfully demonstrated. This in-depth demonstration provides an important insight into Dual Damascene extension feasibility for future critical metal levels.

[1] T. Nogami, Advanced BEOL Interconnects, IITC 2020.

[2] L. Meli, Proc. SPIE 11609, Extreme Ultraviolet (EUV) Lithography XII, 116090P (2021)

[3] S. Decoster, Et al., Proc. of SPIE Vol. 10589 105890E-1(2018)

[4] A. Raley, Et al., J. of Micro/Nanolithography, MEMS, and MOEMS, 18(1)