Devices for quantum computing, quantum communications and quantum sensing share many challenges in terms of the materials, their interfaces, and fabrication technologies. This presentation will quickly review the broad swath of quantum technologies that are being actively studied, while identifying synergies among them that can be exploited for efficient development of integrated quantum computing systems. Advanced process tools capable of exquisite control of the processes, materials and interfaces at 300mm wafer scale have been utilized for the fabrication of structures for quantum computing. Examples of such efforts, including structures for superconducting transmon qubits, resonators, and superconducting nanowire single photon detectors, will be discussed – with an emphasis on the materials and process control issues that needed to be tackled, while keeping manufacturability considerations always in mind. The presentation will conclude with a discussion of how advances in the fabrication of such devices for quantum computing are being applied to ‘adjacent spaces’ such as neuromorphic computing using superconducting optoelectronics (in partnership with AFRL-Rome and NIST Boulder).

For almost 40 years, quantum computing has intrigued and amazed scientists and non-scientists in its future possibility for solving problems that are intractable using classical computing. Over the last three years, IBM has made real quantum computers available on the cloud so that clients, students, and researchers can begin to learn and experiment with this new way of computing. We'll see what use cases are being considered in industry, the state of quantum computing today, and how you can get on the right path to make the earliest use of this rapidly evolving technology.

Several classes of emerging non-volatile memory (NVM) devices are currently being investigated for their application in analog implementation of artificial neural networks (ANN) hardware. The device can be two- or three-terminal and employ a wide range of material systems and associated physical mechanisms to achieve two or more non-volatile memory states. ANN hardware realizations include vector matrix multipliers (VMMs) and neural-inspired or Neuromorphic computing circuits. The NVM devices are employed in the form of crossbar or crosspoint arrays with or without selectors. In order to exploit the high-density and potential low-power operation of these devices, Analog circuit designers need to accommodate non-ideal behavior of these devices. This is particularly important for optimizing transistor-level circuit design for layout area, reliability, and static and dynamic power consumption. NVM nonidealities include device variability, low resistances offered by the two-terminal devices, finite resolution, relaxation of incremental states, limited dynamic range, and read/write endurance. This talk will provide an overview of Neuromorphic System-on-a-Chip (NeuSoC) that can be realized using emerging NVM arrays, expected device characteristics, associated circuit design challenges, and potential strategies for their mitigation. The talk will also include energy-efficiency estimation and benchmarking for NeuSoCs and provide pathways for future work in this area.