The shrinking device dimensions in semiconductor manufacturing call for new innovative processing approaches. One of these considered is selective deposition which has gained increasing interest among semiconductor manufacturers today. Selective deposition would be highly beneficial in various ways, for instance, it would allow a decrease in lithography and etch steps reducing the cost of processing and enable enhanced scaling in narrow structures making bottom up fill possible. Chemical vapor deposition (CVD) and especially atomic layer deposition (ALD) as very surface sensitive techniques are considered enabling techniques.

Selective deposition typically deals with a selective deposition method where, for instance, a metal layer is selectively deposited on metal surface over dielectric surface, or a dielectric layer is selectively deposited on hydrophilic polymer over a more hydrophobic polymer. In most of the selective deposition schemes of today the passivation is used for the surface on which no deposition is desired. The most known method is to use SAM´s (self-assembled monolayers) which are silicon compounds with long carbon chains. Besides the SAM passivation of surfaces also the clever selection of precursors with built-in selectivity in certain process conditions could be applied.

In this paper, the chemistry challenges in the various selective deposition approaches and passivation means are reviewed. In addition, results from the selective deposition of metal on metal over dielectric surface in a Cu capping application and from selective strengthening of DSA (direct self-assembly) layers are presented.

Top-down patterning techniques based on optical lithography have made consumer electronics ever more powerful, ubiquitous and affordable. This is largely due to the ability of lithographic techniques to transfer trillions of mask features to wafers at defect densities approaching virtually zero in high-volume manufacturing. While the resolution of optical lithography tools is typically considered to be the main challenge for continued device scaling, it is actually accurate pattern placement, which has emerged as the biggest concern. Novel bottom-up patterning approaches such as selective deposition are needed to overcome shortcomings in pattern placement accuracy.

The talk will first outline the challenges patterning processes based on 193i pitch division and EUV lithography face in terms of alignment accuracy and how complementary patterning techniques such as selective deposition can reduce pattern placement errors. One of the great challenges of selective deposition is defect mitigation, especially as the sensitivity to killer defects increases as device dimensions scale. Defect mitigation requires a fundamental understanding of the chemical selectivity of surfaces. While molecules can recognize chemical functionality on a surface, selective deposition processes based on atomic layer deposition (ALD) or chemical vapor deposition (CVD) are exceedingly rare and largely limited to specific precursors and substrates. For metal deposition, inherent selectivity was achieved through judicious precursor ligand design. Experimental results will be presented in the context of a theoretical investigations aimed at calculating the kinetic barriers that govern the selectivity of metal deposition. The use of self-assembled monolayers (SAMs) as passivants and/or blocking layers for subsequent deposition is an attractive way of overcoming the non-selectivity of many CVD or ALD processes. Here, the critical parameters for selective blocking are choice of the terminal group, surface termination, carbon chain length, and proper precursor choice. Using SAMs, selective deposition of dielectrics with respect to a variety of surfaces was achieved. The talk will conclude with our vision of how defects can be mitigated: It comprises a fundamental understanding of the chemical nature of the surface, precursors with high kinetic barriers for defect formation, passivation of defect nucleation sites, and the removal of defects post deposition. Selective deposition, if properly resourced and developed, can provide powerful means to future scaling and is one way of ensuring that patterning will continue to support Moore’s Law in the foreseeable future.

Recent developments in electronic devices are pushing toward smaller and smaller features of both metal and dielectric patterns, along with a desire to produce selectively deposited organic thin films on such patterns. Techniques that allow for a high degree of control over the thickness and conformality of organic thin films, such as molecular layer deposition (MLD), are ideal candidates to meet these selective deposition requirements. Using MLD, several types of thin film polymers can be deposited with angstrom-level control due to the sequential, self-limiting surface reactions resulting in monomer-by-monomer growth. Selectivity in the MLD polymer growth is then achieved by utilizing the chemical functionally between the solid substrate surface and the gas phase monomer precursors.

Previously, we have shown the ability to selectively deposit thin film polymers by MLD onto pre-patterned metal and dielectric substrates by utilizing a blocking layer of octadecylphosphonic acid (ODPA) self-assembled monolayers (SAMs) that deposits onto metals more readily than onto dielectric films. Although this process can prevent MLD for up to 6 nm of deposition, selectivity of polymer growth is lost for thicker films, and therefore we are exploring new methods for increasing the MLD selectivity. For the current studies, ODPA SAM is deposited onto a patterned metal/dielectric (Cu on SiO₂) substrate to act as the MLD blocking layer. Once the SAM is fully deposited, polyurea films are grown onto the substrate by MLD to a desired thickness which can be controlled by the number of monomer dose cycles used. An acid etchant is then used to remove the surface oxide of the metal along with the SAM layer while leaving intact the polymer film deposited onto the dielectric. X-ray photoelectron spectroscopy, Auger electron spectroscopy, and ellipsometry measurements show that this process removes undesired MLD film that was deposited on the metal. Studies on patterned substrates confirm selective polymer film growth onto the dielectric over the metal. The etchant removal technique thus increases the selectivity of MLD growth by more than an order of magnitude when compared to the SAM blocking layer alone. Due to the increased selectivity with the etching based process, selective deposition of MLD films as thick as 12 nm have been demonstrated. Atomic force microscopy results show slight surface roughening due to etching while the bulk of the metal/dielectric pattern remains intact. This increase in MLD selectivity should allow for novel applications of selective polymer film deposition.

Metal atomic layer deposition (ALD) processes are typically limited to noble, high work-function metals where uniform nucleation and conformal growth can be problematic. Recent work suggests that 1,4-bis(trimethylsilyl)-1,4-dihydropyrazine (DHP) could be an effective reducing agent for deposition of metals with highly negative electrochemical potentials. This work investigates DHP as a potential reducing agent for tin metal ALD using tin (IV) chloride (SnCl₄).

Experiments were carried out in a custom-built, hot-wall reactor using N₂ carrier gas, an operating pressure of 1.3 Torr, and temperatures between 130 and 170°C. The DHP source was heated to 70°C to maintain a vapor pressure ~1.2 Torr. Initial films were deposited at 130°C on silicon using a SnCl₄/N₂/DHP/N₂ exposure sequence of 4/50/10/50 seconds, then analyzed ex-situ by X-ray photoelectron spectroscopy (XPS) with Ar depth profiling. In sputtering deeper into the film, XPS exhibited both Sn-Sn and Sn-O peaks at 485 and 486.7 eV, respectively, where a decrease in Sn-O and an increase in Sn-Sn peak intensities suggests native oxidation of the film upon exposure to air. Furthermore, 7% Cl and 19% N were found in the films after sputtering, presumably from an incomplete reaction and/or incorporation of reaction byproducts.

To better understand surface reactions and growth mechanisms, we characterized the ALD process at 130, 150, and 170°C using in situ quadrupole mass spectrometry (QMS) and quartz crystal microbalance (QCM). QCM analysis at 130 and 150°C showed continued growth with extended exposures, consistent with non-ALD growth. Deposition at 170 °C was more repeatable and more closely approached surface saturation. At 170°C, QCM showed a clear mass increase during the SnCl₄ dose and a corresponding mass decrease during the DHP dose, consistent with DHP removing Cl and reducing the Sn-Cl surface. Moreover, the QMS results showed peaks exclusively during DHP doses at m/z values of 80 (pyrazine) and 65, 93, 95 (trimethylsilyl chloride), which are the most probable byproducts of DHP reacting with a chlorinated surface.

Using gold-coated QCM crystals at 170°C, Sn growth proceeds slowly for the first ~150 ALD cycles, whereas growth on QCM crystals previously coated with Sn show a more rapid transition to steady-state growth (<20 cycles). We are currently investigating the nucleation on different substrates and how process conditions can be tuned to achieve selective deposition. Understanding the surface reaction and growth mechanisms of tin metal deposition using DHP could provide a foundation for deposition of metal thin-films that were previously unattainable.

Atomic layer deposition (ALD) has become an important process step in semiconductor manufacturing, where the self-limiting nature of each step of the process permits atomic scale control over the ultimate layer thickness in addition to relatively fast processing with high pressure reactors. However, it has been shown that ALD can be used to selectively deposit material onto patterned surfaces, requiring not only saturation of each deposition cycle in desired areas but also suppression of deposition in those areas where it is undesirable. One mechanism for improving practical selectivity would be to find the minimum exposure that is saturates the growth where desired in order to avoid excess overall reaction probability in areas where inhibited growth is preferred.

GST Phase changing material, typically GeTe–Sb₂Te₃ pseudo-binary solid solution, has been extensively studied for rewritable digital versatile optical disks or phase change random access memory (PcRAM), on account of the drastic change of its optical reflectivity or electrical resistivity between amorphous and crystalline phases. As the device size of PcRAM is scaled down, GST materials should be confined into the contact-plug for reducing its programming current, which cannot be achieved by any physical deposition method.

Among the various metal-organic (MO) precursors, the combination of Ge(iBu)₄, Sb(iPr)₃ and Te(iPr)₂ has been extensively studied for plasma enhanced chemical vapor depostion or its variant methods with plasma-activated H₂ gas as a reducing agent of the MO-precursors. Plasma-enhanced pulsed CVD was attempted using the precursor pulse sequence consisting of Sb–Te–Ge–Te cycles (each elemental cycle is composed of precursor injection and Ar + H₂ plasma reduction steps). The chemical composition of the films was appropriately controlled by the cycle ratio and sequence of each precursor pulse. The linear growth with the number of cycles was shown, and the GPC (growth-per-cycle, i. e. growth rate) was determined to be 0.73 nm/super-cycle from the slope at a wafer temperature of 200^◦C.

​Strong substrate dependency can be utilized in the selective growth of GST material on a TiN contact-plug formed in the SiO₂ inter-layer dielectric (ILD). Higher selectivity (difference of GPC) between TiN contact-plug and SiO₂ ILD layer was achieved by pulsed CVD with increasing the amount of Te(iPr)₂ injection. The reason for the selective growth was believed to have originated from the adverse interference of the residual gas (unreacted Te(iPr)₂ or its derivatives) to the chemical adsorption of Sb nuclei on the SiO₂ surface, which functions as a nucleation site for further GST growth. It was reported that amide-based Ge precursors also showed strong selectivity at a particular temperature, enabling Sb and Te precursors to be chemisorbed on the Ge seed layer, which could be utilized for selective growth of GST.

The most feasible explanation for the substrate-dependent growth behavior of the GST film is the electron donation from the substrate, which would enhance the precursor decomposition and removal of ligands from the adsorbed precursor molecules. The nucleation and growth behaviors of the GST films were studied on Si substrates with various nucleation or buffer layers. It turned out that the types of substrates have a crucial impact on the nucleation behaviors and the chemical composition of the film.

Modern electronic devices containing planar and 3-D structures utilize a number of metal/dielectric patterns in both the front and back end. The scaling of next generation electronic devices makes achieving these patterns increasingly difficult and motivates the development of novel processing methods. One such method−area selective deposition−has the opportunity to play an important role in significantly reducing process complexities associated with current top-down fabrication of patterned structures by eliminating some of the deposition and etching steps that are time-consuming and expensive.

Atomic layer deposition (ALD) is a good choice for area selective deposition because its chemical specificity provides a means to achieve selectivity on a spatially patterned substrate. Area selective ALD, reported previously by several groups, requires improvements for the process to be compatible with current device fabrication goals. Most previous studies of area selective ALD have achieved deposited thicknesses on the order of only a few nanometers and the selectivity was generally obtained by passivation of the surface using self-assembled monolayers (SAMs) in the regions where ALD was not desired. Existing methods are usually performed by dipping the substrates into a solution containing the SAM-forming molecules for several hours. A more desirable all-vapor process would require vapor delivery of the SAMs. This method would provide better SAM coverage on porous or three-dimensional structures, potentially decreasing the required deposition time for the passivation layer, and allowing the SAM passivation step to be integrated with the rest of the ALD process.

In this work, we investigate area selective dielectric-on-dielectric deposition by selectively depositing organic alkanethiol SAM as the blocking layer on metal parts of a metal/dielectric (Cu/SiO₂) pattern. We compare area-selective ALD achieved by introduction of the thiolate SAM in both the solution and vapor phase. We show that while in both cases the SAM can prevent subsequent deposition of metal oxide dielectric films via ALD, vapor deposition provides stronger passivation in a shorter exposure process on the metal. We also report results on regenerating the thiol SAM protecting layer from the vapor phase between ALD cycles and show that this approach is effective in improving the blocking properties of the SAM on Cu. This strategy provides the ability to significantly improve selective deposition of dielectrics. Moreover, it is a significant step toward an all-vapor process for area selective deposition, opening up the possibility for new applications in next generation electronic devices.

For the last 5 decades, the semiconductor industry has relied on the continued scaling down of the device feature size in order to improve performance and increase bit density according to Moore’s law. However, with the delay in implementation of extreme ultraviolet lithography (EUV) in high volume manufacturing,¹ patterning beyond the 14 nm technology node is getting extremely difficult to manage due to the overlay control and the increase in manufacturing cost due to multi-layer alignments. In order to keep reducing the device feature size, new patterning solutions are needed such as selective deposition and selective etching of materials. Atomic layer deposition (ALD) has emerged as one of the leading film deposition techniques as a result of the semiconductor device scaling.² ALD provides excellent film control, uniformity and high conformality. ALD is highly surface reaction driven and it is possible to modify the substrate surface to activate or deactivate growth on selected area hence selective-area ALD (SA-ALD). Selective-area ALD can simplify and reduce the high manufacturing cost associated with highly aggressive patterning schemes by eliminating certain lithography steps. Thin films can now be selectively deposited or removed from a desired area. Most selective-area ALD studies in the literature are conducted with the use of self-assembled monolayers (SAMs) in order to deactivate or activate growth on certain areas.^3-5 SAMs are thin organic films that form spontaneously in tightly packed oriented molecules on solid surfaces. A key enabler of SAMs is the ability to turn these organic layers into patterned layers. However, thermal stability and the slow formation process into well packed layer are some of the major drawbacks of SAMs.⁵

In this study, a non SAMs based approach was used to inhibit ALD growth of metals and metal oxides. Using different surface treatments, it was observed the growth of the ALD thin films can be modulated, see Fig.1 and Fig.2 respectively. ALD Al₂O₃ growth was suppressed by a combination of the vapor HF and cyclical low temperature plasma hydrogen treatment and deposition. Additionally, ALD TaN growth was also inhibited by the use of a combination trimethylsilane (TMS) and dimethylamine (DMA) treatment of the surface prior to ALD deposition.

Reference

1. J. Beynet, et al, Proc. SPIE, 7520, 75201J (2009).

2. S. M. George, Chem. Rev.110, 111 (2010).

3. ChaMarra K et al. Nanotechnol,3, 114 (2012).

4. J. C. Love et al., Chem. Rev.,105, 1103 (2005).

5. A. J. M. Mackus et al, Nanoscale, 6, 10941 (2014).