ZnO and its related semiconductors are remarkable multi-functional materials with a huge range of existing and emerging applications including transparent conducting oxides (TCO) and light emitting diodes (LED). In order to obtain physical properties required for such applications, control of the crystallinity (grain size, crystal axis alignment, crystal defects) is of great importance. We have recently developed a new fabrication method based on magnetron sputtering, “Impurity mediated crystallization (IMC)”, where crystal nucleation and the growth are controlled by impurity atoms adsorbed on the film surface [1,2]. Here we demonstrate sputtering deposition of two kinds of ZnO films by utilizing buffer layers fabricated via IMC method. One is polycrystalline TCO films fabricated on glass substrates, and the other is single crystalline films on sapphire substrates for LED applications. Effects of impurity during the crystal growth of ZnO are studied by observing the evolution of film morphology by means of atomic force microscopy (AFM).

IMC-ZnO buffer layers have enabled fabrication of single-crystalline ZnO films even on large lattice-mismatched (18%) sapphire substrates by a conventional sputtering method. The ZnO films have atomically-flat surfaces with steps of 0.26nm-hight, corresponding to a half of c-axis length of ZnO. AFM observation of IMC-ZnO buffer layers revealed that impurity atoms inhibit the crystal growth and thus increase in the grain density, which reduce the strain energy caused by the large lattice mismatch between ZnO and sapphire. IMC-ZnO buffer layers have also improved the film quality of ZnO based TCO fabricated on glass substrates. The most remarkable effect is a reduction in the resistivity of the films thinner than 100 nm. The resistivity of ZnO:Al films fabricated by conventional sputtering increases substantially from 6.3×10^-4 W×cm to 1.5×10^-3 W×cm with decreasing the film thickness from 100 nm to 20 nm, while the resistivity of ZnO:Al films with IMC buffer layers is low of 2.8-3.2×10^-4 W×cm in the thickness range 20-100 nm. The role of impurity here is to suppress the nucleation and allow the crystal growth with larger grains from the very early stage of deposition.

We believe that IMC method will not only accelerate the commercialization of ZnO in optoelectronic devices but also open up a new pathway for development of other oxide semiconductors, some examples of which including In₂O₃:Sn will be presented at the conference.

This work was partially supported by JSPS (25630127), JST-PRESTO, and AOARD.

[1] N. Itagaki, et al., Appl. Phys. Express 4 (2011) 011101. [2] K. Kuwahara, et al., Thin Solid Films 520 (2012) 4507.

The development of Ge-based field effect devices requires the integration of a high quality dielectric that forms an electrically well behaved semiconductor dielectric interface. Although GeO₂/Ge has been found promising, the thermodynamic instability as well as the relatively low dielectric constant of GeO₂ requires an alternative approach. The utilization of an ultrathin Si layer to move the semiconductor/dielectric interface from Ge into Si has been successfully demonstrated; however, the introduction of a planar thin layer into the gate stack is incompatible with a 3D FinFET manufacturing process flow. It is thus desirable to develop a multilayer gate stack by atomic layer deposition process, where an ultrathin GeO₂ layer can be thermodynamically stabilized and combined with a high-k dielectric film to meet the stringent requirement of low interface trap density and large capacitance density while maintaining a low gate leakage.

In this talk, we will present an approach of developing a multilayer gate-stack of HfO₂/Al₂O₃/GeO₂ for Ge using in-situ processing control in plasma-enhanced atomic layer deposition (PEALD) by utilizing real-time monitoring capabilities of in-situ spectroscopic ellipsometry (SE). Pristine Ge-surface is obtained by removing native GeO_x using H-plasma and an ultrathin GeO₂ layer is grown thereafter by O-plasma anneal; in-situ SE is used to monitor the process and to control GeO₂ thickness. An ultrathin bilayer of alumina and hafnia is subsequently grown using thermal ALD and large capacitance densities with equivalent oxide thicknesses (EOT) below 1 nm and gate leakages below 1×10^-4A/cm² at -1V (EOT=0.7 nm) are demonstrated. The impact of the thickness of the individual dielectric layers on interface trap density, determined by the conductance and the Terman method, leakage current and EOT is discussed. We will further discuss how in-situ SE is used to optimize process-relevant parameters for native oxide etching, intentional oxidation and deposition of high-k dielectrics. The potential of this in-situ real-time process metrology is projected for the development of high quality high-k dielectrics on other high mobility low band gap semiconductor materials.

In Dual Frequency plasma etching, one frequency is chosen to be much higher than the other in order to achieve an independent control of ion bombardment and electron density (i.e. ion flux). It is assumed that high frequency control the density and low frequency (LF) the energy. Recently, many groups have simulated the effect of LF addition to RF source. Depending on the model, it has been reported that the plasma density may be reduced due to sheath width variation as well as it may be increased due to highly energetic secondary electrons. Donko et al have shown how the γ coefficient of the secondary electrons may be used to interpret contradictory published papers [1] and they concluded that there is only a small pressure process window for which the effect of secondary electrons on the ionization compensates the effect of the frequency coupling.

The interest of adding LF to RF plasma in order to enhance the deposition reaction mechanisms is demonstrated here. An in depth investigation of plasma by Optical Emission Spectroscopy shows that the plasma density increases when adding LF (350 Khz) in a RF (13.56 Mhz) metal deposition process. In this case, the plasma enters a γ-mode due to secondary electron heating. This mode is not obtained when depositing semiconductors (GeTe) or dielectric, i.e. depending on the biased nature of the surface of showerhead electrode during the process. Adding LF to RF also modifies the sheath thickness of the plasma and increases the electron temperature of the gas [2]. In our experiments, all the deposited materials show different properties and new emission peaks are observed by OES for all precursors. Carbon content, density and growth rate are strongly modified by adding LF. For example, in case of TiN we found that the deposition rate is increased by a factor of two while in the same time the resistiviy is strongly reduced (50%) and the density is going from 3.4 to 3.8 g.cm^-3[3]. We also studied the plasma impact on the Equivalent Oxide Thickness (OET) regrowth of a TiN/HfO₂ integrated MOS capacitors. For phase change material (PCM) applications, very different cycles (amorphous to crystalline) are observed for devices with RF GeTe or LF+RF GeTe. All the deposition processes are performed in 200 (GeTe) and 300 mm (TiN) pulsed liquid injection PEMOCVD chambers from AltaCVD Advanced Materials^TM, located in CEA-LETI cleanroom.

[1] Z. Donkó, et al, Appl. Phys. Lett. 97 (2010) 081501

[2] W-J Huang et al, Phys. Plasmas 16 (2009) 043509

[3] F. Piallat et al, J. Phys. D: Appl. Phys.47 (2014) 185201

III-Ns (InN GaN and AlN) and their alloys have been attractive semiconductor materials for application in a wide range of device technologies. The most common growth methods of this material system are CVD and MBE, but these conventional growth techniques have challenges in achieving alloys without phase separation over the entire stoichiometric range, ultimate thickness control at the atomic level, and the ability for in situ growth of complete device structures. Plasma-assisted atomic layer epitaxy (PA-ALE) is a promising method to grow III-N alloys and incorporate them into device structures as it allows low temperature growth and precise control of thickness, stoichiometry and uniformity. Recently, PA-ALE has been used for the growth of III-N binaries at low temperatures (≤500°C)[1,2]. Ternary growth at these low temperatures could eliminate miscibility gaps, which has been an issue for conventional growth methods.

We present the growth and characterization of III-nitride ternaries by PA-ALE over a wide stoichiometric range including the range where phase separation has been an issue for MBE and CVD. Using our previously reported optimal growth conditions for GaN, InN [1], and AlN [2], Al_xGa_1-xN, In_xAl_1-xN and In_xGa_1-xN (0≤x≤1) alloys were grown at 250–500 °C. Group III-B metal contents in these alloys were varied with binary cycle ratios and the alloy compositions were determined by XPS and XRD and reflectivity measurements. Since the growth rate (GR) of InN is slower than that of AlN, a digital alloy produced from 3 cycles of InN for every cycle of AlN results in an Al_0.83In_0.17N film. The GaN GR, however, is slower than InN, and In_0.54Ga_0.46N alloy was grown for every alternating cycle of GaN and InN. Additionally, 4 cycles of GaN for every cycle of AlN gave Al_0.5Ga_0.5N alloy and the measured concentration was confirmed optically. By this digital alloy growth method, we are able to grow In containing ternaries by PA-ALE in the spinodal decomposition region (15-85%). The surface roughness of III-N alloys on GaN were the same as the starting roughness of 0.4 nm. Optimal ternary growth conditions were used to synthesize III-N based device structures on GaN and demonstrated 2DEG at the interface. We will present electrical and optical data on ALE III-N heterojunctions on GaN templates.

These early efforts suggest great promise of PA-ALE for addressing miscibility gaps issue encountered with conventional growth methods and realizing high performance optoelectronic and electronics devices involving ternary/binary heterojunctions, which are not currently possible.

[1] N. Nepal et al., JCGS 13,1485 (2013).

[2] N. Nepal et al., APL 103, 082110 (2013).