AVS2001 Session PS-ThP: Plasma Etching Poster Session

Thursday, November 1, 2001 5:30 PM in Room 134/135

Thursday Afternoon

Time Period ThP Sessions | Topic PS Sessions | Time Periods | Topics | AVS2001 Schedule

PS-ThP-1 Damage Recovery of Etched PZT Thin Films in CF4/Cl2 Plasma with the Addition of Ar, N2 and O2
M.G. Kang, K.T. Kim, C.I. Kim (Chung-Ang University, Korea)
Ferroelctric lead zirconate titanate (Pb(Zr,Ti)O3) thin films have been known for their applications in memory devices such as nonvolatile ferroelecric random access memory (FRAM) because of their high dielectric constants and bistable polarization. It is expected that PZT will improve the limitations in storage density encountered in conventional Si memory technology. Among the various dry etching techniques, great attention has been paid to the reactive ion etching (RIE) because it provides a high degree of anisotropy and good selectivity with the great process control. However, the RIE process degrades electrical properties, which are related to physical damage and chemical residue contamination. In this study, PZT thin films were etched by additive Ar, N2, O2 in CF4/Cl2 inductively coupled plasma. The etch rate is observed by various parameters. We also observed the effect of etching damage in PZT thin films during etching in inductively coupled plasma (ICP) etching system. SEM is used to survey the etching profile. We investigate that the recovery characteristics of etching damage used rapid thermal annealing (RTA) at various temperature. The polarization-electric field (P-E) curves were measured with a RT66A ferroelectric tester. The physical damages to the near surface of PZT are evaluated by atomic force microscopy (AFM) and x-ray diffraction (XRD) The etched surface was surveyed x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS) analysis. This research was supported by the Consortium of Semiconductor Advanced Research (COSAR) as project No. 00-B6-C0-00-09-00-01
PS-ThP-2 Dry Etching Characteristics of YMnO3 Thin Films Using Inductive Coupled CF4/Cl2/Ar Plasma
C.I. Kim, D.P. Kim (Chung-Ang University, Korea)
Ferroelectric YMnO3 thin films are excellent dielectric materials for high integrated ferroelectric random access memory (FRAM). YMnO3 thin films have one polarization axis (c-axis), contain heavy and hard-deoxidizing elements, and do not contain volatile elements such as Bi and Pb, which easily diffuse into the Si substrate and lead to point defects. In this study, YMnO3 thin films were etched with a CF4/Cl2/Ar gas combination in inductively coupled plasma (ICP). Etching characteristics on ferroelectric YMnO3 thin films have been investigated in terms of etch rate and selectivity. The CF4/(CF4+Ar) was fixed at 0.2, and the YMnO3 thin films were etched by adding Cl2. Etching properties of YMnO3 were measured according to the various etching parameters such as the rf power, dc-bias voltage, chamber pressure, and gas mixing ratio. The chemical reaction in the surface of the etched YMnO3 films was investigated with x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS). For the diagnosis of the CF4/Cl2/Ar plasma, optical emission spectroscopy (OES) and Langmuir probe were used. The etch profile and surface residues of etched YMnO3 thin films was investigated by scanning electron microscopy (SEM).

Acknowledgement; University Research Program supported by Ministry of Information and Communication in South Korea.

PS-ThP-3 Reduction of Plasma-Induced Damage through Ion-Ion Synchronous Bias
L.J. Overzet, S.K. Kanakasabapathy (University of Texas at Dallas); K.P. Cheung, M.V. Malyshev (Agere Systems)
Electron-shading induced differential-charging of anisotropic etch structures has been shown to be a cause of plasma process induced-damage.1 It is due to a disparity in the angular velocity distributions of negative and positive species in conventional electron-ion plasmas. Electron-free plasmas, also known as negative-ion/positive-ion (ion-ion) plasmas can be made devoid of this disparity. The comparable masses and average energies of negative and positive ions in the center of an ion-ion glow allow nearly equal anisotropy to be produced in their velocity distributions when biased. Ion-ion plasmas can be formed by extinguishing the plasma power and waiting an appropriate time. For example: electrons are lost rapidly (~10's of µsec) to attachment in the afterglow of pulsed Cl2 discharges leaving behind an ion-ion plasma that lasts for ~100's of µsec. Alternating fluxes of high kinetic energy positive-ions and negative-ions can then be produced by applying a low-frequency AC bias to the processing substrate. When this AC bias is pulsed synchronously with the plasma power and phase locked to the ion-ion plasma, it can produce alternating fluxes of positive-ions (Cl2+) and negative-ions (Cl-).2 This ion-ion `synchronous bias' is superior for extracting negative-ions compared to an `asynchronous bias' due to the low DC self-bias it induces. We have demonstrated a reduction in electron-shading induced potentials for ion-ion synchronous bias using in-situ charge-monitoring circuitry. We have also compared some cross-sectional micrographs of etched polysilicon lines on oxide. Our limited results indicated an improvement in etch profiles for ion-ion synchronous bias at the smallest linewidth of 0.45µm.

1 G.S. Hwang and K.P. Giapis J. Appl. Phys., 82, 566(1997)
2 S.K. Kanakasabapathy, L.J. Overzet, V. Midha and D.J. Economou, Appl. Phys. Lett., 78, 22(2001).

PS-ThP-4 Investigation of Nitride Morphology after Self-Aligned Contact Etch
D. Keil, J.W. Shon, B.A. Helmer, T. Chien, P. Gopaladasu (Lam Research Corporation); J. Kim (Samsung Corporation); H. Hwang (NASA Ames Research Center)
Self-Aligned Contact (SAC) etch has emerged as a key enabling technology for the fabrication of very large-scale memory devices. However, this is also a very challenging technology to implement from an etch viewpoint. The issues that arise range from poor oxide etch selectivity to nitride to problems with post etch nitride surface morphology. Unfortunately, the mechanisms that drive nitride loss and surface behavior remain poorly understood. Using a simple langumuir site balance model, SAC nitride etch simulations have been performed and compared to actual etched results. This approach permits the study of various etch mechanisms that may play a role in determining nitride loss and surface morphology. Particle trajectories and fluxes are computed using Monte-Carlo techniques and initial data obtained from double Langmuir probe measurements. Etched surface advancement is implemented using a shock tracking algorithm. Sticking coefficients and etch yields are adjusted to obtain the best agreement between actual etched results and simulated profiles.
PS-ThP-5 Development of Self-aligned Contact Technology on a Capacitively Coupled System
T. Chien, C. Nelson, D. Keil, E.A. Hudson, K. Makhratechev (Lam Research Corporation)
Self-aligned contact (SAC) technology was developed to enable efficient reduction of active areas of an integrated circuit. However, implementation of SAC etch and process integration has been very challenging. Many factors are known to influence SAC etch performance. This work addresses the effects of the machine factors (pressure, gas flow/ratio, temperature, RF powers, other gas addition, etc.) and different fluorocarbon gases in a capacitively coupled plasma etch system. Results from several designed experiments (DOE's) will be present which explore main effects and interactions for several key variables affecting SAC etch. Trends identified include critical dependencies of etch results on power and gas flow. To better understand the mechanisms responsible for the trends observed, UV absorption spectroscopy and Langmuir probe measurements were also implemented for each DOE condition. Correlations observed between these measurements and etch trends will be discussed.
PS-ThP-6 Surface Analysis of a High Selective Polysilicon to Oxide Plasma Etching Process
T. Tai, S. Molis, W. Yan (IBM, SRDC)
With continuing reduction of minimum feature size in semiconductor device fabrication, limited gate stack height becomes necessary to control the bitline?wordline capacitance, and to reduce bitline contact aspect ratio for better process performance. Tungsten, which has a lower sheet resistance and hence the capability to reduce gate stack height, has been selected to replace widely used tungsten silicide in the gate structure. However; because of the chemical nature of tungsten, tungsten to oxide RIE selectivity in the Fluorine etching enviroment is not adequate to prevent thin gate oxide (less than 40A) to be punched through. A polysilicon etch step with adequate selectivity to oxide has been developed to prevent gate oxide punchthrough. Xray Photoelectron spectroscopy and Time-of-Flight Secondary Ion mass spectrometry were applied to investigate the Poly and Oxides in a high-density plasma etching environments with HBr/Cl2/O2 chemistry. The results will lead to the undertanding of the RIE chemistry that provide the selectivity.
PS-ThP-7 Investigation of the Performance of MERIE Etcher for Extended Conditions of Consumable Upper Electrode/Gas Distribution Plate Lifetime
D.V. Semach (Silicon Manufacturing Partners Pte. Ltd., Singapore)
Lifetime of consumable parts used in semiconductor industry correlates directly with cost-of-ownership and overall equipment effectiveness. In this study lifetime of Bush upper electrode that is the consumable part of TEL85DRM dielectric etch chamber had been improved from conventional 500 to 1200 RF hours. The part is produced of aluminum, anodized and equipped with inserts gas holes been drilled through. During processing gas holes are enlarged because of the inserts material etching hence the gas distribution pattern conductance is increased. Continuously monitoring equipment and process parameters (process gases partial pressure, particle count, etch rate, non-uniformity, etching profile, etc.) subject to the gas holes integrated size there had been found that the pattern conductance increasing up to 400 % (during the part operation from 500 to 1200 RF hours) and even by 40 times (as a result of special inserts boring) had not affected these parameters. It proves that the pattern conductance is not a limitation factor for the chamber performance and plasma is stable and uniform under these conditions. As is well known, during running and wet clean the surfaces of the chamber parts deteriorate progressively. Series of chemical analysis of polymeric stratums been peeled out from the electrode surface had shown significant increase of AL and O level at the stratum side being in contact with the surface with increasing of the part operational time. However surface analysis of wafers been processed after the chamber wet clean and seasoning had not disclosed any AL and the other metal contaminations as at the initial stage as at 1200 RF hours of the part operation. All the results had been confirmed for several electrodes and chambers. The real possibility to extend the part lifetime to 2000 RF hours and more if apply soft wet clean method detailed in the body has also been shown.
PS-ThP-8 Electron-Temperature Control in 915 MHz ECR Plasma
N. Itagaki (Kyushu University, Japan); S. Kawakami, N. Ishii (Tokyo Electron Co. Ltd., Japan); Y. Kawai (Kyushu University, Japan)
In semiconductor processing, it is required to control the electron temperature in plasma for progress of microelectronic devices and minimization of substrate damage. Since the reactive processes occurred strongly depend on the electron temperature, this control is also necessary to find the best conditions for various plasma processings. An electron cyclotron resonance (ECR) plasma source has attracted much attention for its high electron density (1017-1018 m-3) that can be achieved at low gas pressure (10-4-10-3 Torr). However, in a conventional ECR plasma produced by 2.45 GHz microwave, the electron temperature is relatively high, and it is quite hard to control the electron temperature in a wide range. Recently, we succeeded in production of a low-electron-temperature ECR plasma with high electron density using 915 MHz microwave. Furthermore, it was found that the electron temperature depends on the external conditions such as incident microwave power, gas pressure and magnetic field configuration. In this report, we measured the electron temperature of 915 MHz ECR plasma in detail and attempted to control the electron temperature by changing the external conditions. As a result, it was found that the electron temperature of the 915 MHz ECR plasma can be easily controlled by changing the incident microwave power in the case that the magnetic field configuration is flat. Especially, at the gas pressure of 8.5 mTorr, the electron temperature decreased nearly from 7 eV to 1.6 eV as the microwave power was decreased from 2.5 kW to 0.5 kW. In addition, we have tried to investigate the mechanism of a low-electron-temperature plasma production with 915 MHz microwave by measuring the spatial profile of the plasma parameters and wave patterns.
PS-ThP-9 High Performance SiO2 Etching using C4F8 and C5F8
S.H. Rha, D. You, C.W. Lee, J.Y. Choi (Advanced Technology Line, Korea)
SiO2 etching characteristics of C4F8 and C5F8 were comparatively studied. The 2MHz rf-biased electrostatic chuck in13.56MHz high-density transformer coupled plasma (TCP) reactor was used. The typical operating conditions is 10-15 mTorr, 300-400 sccm(total flow rate), 2500W Source power and 1800W rf-bias power. C4F8 and C5F8 were employed as source gases to investigate their differences in etching performance and selectivity on both SiO2 and PR. For increasing the SiO2/PR Selectivity. The CH2F2 was used. And the optimum CH2F2 mixing ratio for SiO2 etching is reported that. Based on these results, in sub-micron contact hole(0.1-1µm) etching, we achieved SiO2 etch rate is more than 6000A and SiO2/PR selectivity is 5:1.
PS-ThP-10 Applicability of a Hollow-electrode Plasma Jet System for Etching of Diamond-like Carbon (DLC) Films
P.E. Lima, H.S. Maciel, M. Massi (Instituto Tecnologico de Aeronautica - ITA, Brazil); R.D. Mansano (LSI - Escola Politecnica - USP, Brazil); G. Petraconi, W. Urruchi, C. Otani (Instituto Tecnologico de Aeronautica - ITA, Brazil)
Partly in response to the challenges of etching high-aspect-ratio features, it is introduced a new plasma tool based on the hollow-electrode discharge. Plasma jets are capable of operating at relatively low gas pressures, 10-5 Torr, what is in somehow advantageous in comparison with reactive ion etching (RIE) systems, because it reduces contamination from sputtered electrode materials, which eventually produces undesirable micromasks. On the other hand, the non-uniformity of the etching with plasma jets limits the applicability of this technique for microelectronic purposes. To minimize this problem, a plasma beam formed by a multi hollow-electrode system was developed in order to produce an uniform beam, which was used to etch diamond-like carbon (DLC) films. These films of approximately 1.5 µm thick were deposited on 3-inch diameter, p-type, (100) silicon wafers, by magnetron sputtering, at a deposition rate of approximately 4.5 nm/min. After being characterized, samples were separated in two batches, one of then was etched in a single hollow-electrode plasma jet and the other one was etched in a multi hollow-electrode plasma jet. During the etch processes a mechanical mask was used to cover part of the samples with the purpose of producing a step between the etched and non-etched regions. This step was measured by a perfilometer and the etch rates were determined in different positions on the samples. The results obtained with the single configuration showed a high non-uniformity in the etching. This non-uniformity was substantially reduced by using the multi hollow cathode system. The multi hollow-electrode plasma beam system revealed to be a reliable technique for DLC films processing, giving etching uniformity and etching rate characteristics as good as those obtained with usual RIE systems, with the advantage of being a simple and low cost equipment.
PS-ThP-11 Influence of Polymerization on Pressure Control System Performance during Dielectric Etch Processes
D.V. Semach (Silicon Manufacturing Partners Pte. Ltd., Singapore)
Various effects taking place in plasma etch systems exert essential influence upon process characteristics and control. In this study pressure control valve (PCV) operation during dielectric etch processes in MERIE (magnetically enhanced reactive ion etching) reactor was investigated. Growth of polymers on grating type baffle separating plasma and exhaust zones of the reactor is causing the exhaust conductance and in this connection chamber pressure to change dynamically. During running of an evaluated process based on increased gas flow of high-molecular fluorocarbon and argon mixture fast changes in PCV behavior were observed. Intensive polymerization was suspected to be a main reason for these changes. Detailed monitoring of chamber manometer and PCV readings let to evaluate polymers rates of growth and shrinkage and dynamics of some other processes affecting the valve movement, and also define the limitations for pressure control. The polymers formed on anodized aluminum chamber parts were found to be thick, very dense and hard. Detailed examinations of the polymeric stratums showed that they consisted of many thin layers. The thickness of one layer was just about a hundred nanometers. Thus we could suppose that every single layer of formed polymer refers to individual wafer. Chemical analysis of the polymers showed that they consist mostly of fluorine and carbon. Ratio of fluorine to carbon contents was about 2 to 1. The investigation results show that polymers formed during plasma etching may significantly decrease pumping and pressure control systems capability depending on temperature, structure, density and volume of the polymers. Process pressure, mass flow of gas mixture components and correlation between RF power on and RF power off time intervals were found to be the main factors responsible for polymers formation and behavior.
PS-ThP-13 Challenges in 0.1µm Line and Space Nitride Hard Mask Etching
Y.S. Chae, J. Kim (Samsung Semiconductor R&D Center, Korea); W.M. Ahn, J.W. Shon (Lam Research Corporation); W.S. Lee, I.S. Kim, Y. Kang (Samsung Semiconductor R&D Center, Korea); J.P. Lee, B.K. Kong (Lam Research Corporation); C.J. Kang, J.T Moon (Samsung Semiconductor R&D Center, Korea)
As device feature size shrinks near 0.1 micron, PR (Photo Resist) erosion, microloading and striation are all much more serious due to 3D effect. And the thickness of nitride hard mask also becomes higher to prevent the electric short between gate and contact during SAC (Self Aligned Contact) process. These lead to require PR selectivity higher up to 4. Since the vertical metal-etch traditionally produces positive CD (Critical Dimension) bias, the nitride hard mask etching needs to produce negative CD bias. Therefore, we need to etch PR with high selectivity and negative CD bias, which is in trade-off relations. We have characterized the process trends in CD bias, striation and PR selectivity of nitride hard mask etching in terms of additive chemistry, RF power and its ratio. Best process results show narrow process window for relatively lower power with narrow range of O2 flow. Successful results for 0.09 micron process are obtained for lower ion energy process with high Ar flow.
PS-ThP-14 Trench Etch Characteristics of Via-first Dual Damascene Process on 0.15µm SRAM Technology.
W.-S. Kim, J.-I. Cho, I.-S. Choi, J.-J. Lee, H.-S. Shin, H.-S. Yang (Hynix Semiconductor Inc., South Korea)
Recently, via-first dual damascene process with cost-effectiveness and fabrication complexity reduction has been proposed as an alternative to get over the limitation of conventional interconnection processes. However, it has some problems such as the formation of the fence and the facet around the via hole in the trench etching process. Especially, the fence can cause bad via hole filling and the incomplete removal of resist residues. In this study, we investigated the effect of CH2F2 and CO addition into C4F8 plasma on fence formation, and also relationship between organic ARC fill thickness and fence formation. Physical features were analyzed with SEM and TEM. And electrical characteristics were examined with continuity/bridge patterns. For the surface analysis, the etched oxide films with C4F8/CH2F2 and C4F8/CO, respectively, were characterized with XPS. In the trench etching with C4F8/CH2F2 plasma, the fence height was increased with organic ARC thickness. Since the organic ARC on the sidewall of the via hole played a role as the etch barrier during trench etching, fence-shaped oxide residue was occurred around the via hole. Moreover, in this study, we could also observe the fence profile in a condition of no organic ARC with C4F8/CH2F2 plasma because the polymer deposited at the top edge of the via hole prevented oxide etching around the via hole whereas fence free with C4F8/CO plasma. The XPS surface analysis data clearly showed that C4F8/CH2F2 plasma had higher intensity for C-C bonds and C-H bonds in comparison with C4F8/CO plasma. Therefore, in order to obtain fence-free trench profiles, optimization of ARC thickness and also use of low polymerizing plasma were simultaneously needed. Consequently, for 0.15µm SRAM technology, the fence-free trench etching was achieved with low polymerizing C4F8/CO plasma and optimum ARC fill thickness which was slightly lower than the etch stopper in the via hole.
PS-ThP-15 Etching Characteristics for Porous Silica (k=1.5) by Using NLD Plasma in a Low Pressure
Y. Morikawa, N. Mizutani, T. Hayashi, T. Uchida (ULVAC Japan Ltd.)
The etched profile of the porous silica1 (produced in ULVAC Japan Ltd.) was obtained as an almost vertical structure. The etch rate was approximately 2 times higher than that of the SiO2 film when linear saturated perfluoro carbon compounds were used,2 because the overall film density of the porous silica is low. However, in the case of C4F8 (Octafluorocyclobutane) plasma, the etch rate ratio to the SiO2 was about 1.45. When C4F6 (CF2=CFCF=CF2: Hexafluorobutadiene) was used, the etch rate ratio was also very low (0.6). So the etch rate strongly depends on the gas structure, whereas the SiO2 etch rate is almost constant. The Vpp of the RF bias was almost same for all kind of fluorocarbon gases. It was observed that CxFy+ ions were main species in the C4F8 or C4F6 plasma (QMS) and a polymer film was formed on the etched surface (XPS). Therefore, it is considered that the fluorocarbon polymer formed in the pore suppresses the etch rate of the porous silica in the C4F8 or C4F6 plasmas. C3F7I (CF3CFICF3: 2-iodoheptafluoropropane) gas was examined. The etch rate selectivity of photo resist to porous silica went up about 50%, compared with C3F8. Negative F- ion in the C3F7I plasma was obtained as a very small peak, contrary in the C3F8 and other fluorocarbon plasmas. On the other hand, I- ion intensity was very strong. These results may imply that the iodine in the plasma plays some roles for etching.

1C. Tanaka and H. Murakami, Extended abstract (The 61st Autumn Meeting, 2000); The Japan Society of Applied Physics, 750 (4a-P4-27).
2Y.Morikawa et al., J.Vac.Sci.Technol.A19(4), Jul/Aug (2001).

PS-ThP-16 Trench Etch Challenges in a Cu/Low-k Via-First Dual Damascene Scheme
P. Jiang, H. Hong, Q. Hong, K.J. Newton (Texas Instruments, Inc.)
In a via-first copper dual damascene integration scheme, trench patterning is one of the most critical steps, for both lithography and etch. Due to via topography, resist thinning occurs in dense via region during trench pattern, resulting in potential resist breakdown during trench etch. To prevent trench bridging or metal shorting, it becomes necessary to keep good trench etch profile and high resist selectivity. However, another key issue for trench etch is oxide ridge formation around vias which can disrupt metallic barrier and copper deposition resulting in degraded device reliability. In achieving good trench profile and high resist selectivity, oxide ridges often become severe. Therefore, it is very challenging to control profile, resist selectivity and oxide ridge formation simultaneously. In this paper, we will discuss the options and results that meet the special requirements for Cu/low-k dual damascene trench etch. The low-k dielectric film used in this work was an organosilicate glass (OSG). The effect of etch process parameters on trench profile, resist selectivity and ridge formation will be discussed, along with the resist effect on resist etch selectivity. Electrical results showing significant yield improvement with the optimal etch process will also be reported.
PS-ThP-17 N2 Addition Effect on Highly Accurate Organic Low-k Etching Process
Y. Morikawa, M. Ozawa, N. Mizutzni, T. Hayashi, T. Uchida (ULVAC JAPAN Ltd.)
Etchings for organic low-k materials, FLARETM and SiLKTM, had been carried out at a N2 dominant mixing ratio in an N2 + H2 plasma generated by the magnetic neutral loop discharge (NLD) method at low-pressure below 1 Pa.1. We had tried to control micro-trench free profile by using nitrogen-organic surface reactions in a fine pattern etch process. As the result, we were able to successfully control the profiles without micro-trench when the substrate temperature was kept above 0°C, blow 1 pa. Usually, when the N2 + H2 plasma with H2 dominant mixing ratio or only NH3 plasma is used, bowing profiles were obtained such a substrate temperature. However, the plasma with the N2 dominant mixing ratio was used, bowing did not occur in the temperature range of 0°C to 30°C. Under this condition, the N1s/C1s ratio on the etched surface increased with increase of the temperature. This may be due to an enhancement of nitrogen addition reactions on the surface and thereby the sidewall is passivated. Negative ions in the H2+N2 plasma were measured by using a quadrupole mass spectrometer. NH2- and CN- negative ions were observed as main peaks. These species decreased with the pressure. The CN- ion signal abruptly decreased at the end point. We will also report a finely deep etching process over 1.0 µm without any micro trench and without pillar residues on the etched surfaces.

1Y. Morikawa et al, Proc.Symp.Dry Process, 263 (2000)
2Y. Morikawa et al, J.Vac.Sci.Technol.,A19 (4), Jul/Aug (2000).

PS-ThP-18 Damage Free Gate Shrinkage Method Using Low Temperature Si3N4 Film Deposition and SF6/O2 Gas Mixture Etching
C.R. LIM, J.H Shin (LG-Elite (LG-Electronics Institute of Technology), South Korea)
Recently, the concern about sub micron gate length formation method for development of high performance FET is increasing. But, sub micron gate length could not be gotten using optical contact aligner or cheap stepper machine. And, in order to reduce resistance in FET gate electrode which had short gate length, we use normally T-shaped gate whose head was wide about 1 micrometer. In our lab, we tried to make FET whose gate length was shorter than the exposed gate length. After lithography of about 0.4 micrometer gate length using stepper, and we deposited silicon nitride film at low temperature to protect photo resist from deformation and at low work pressure to form conformal shape. Deposited silicon nitride film was etched using conventional RIE medium-pressure reactor and we tried to find proper etch condition from varied SF6/O2 gas ratio and could know proper etch condition of the ratio 3:7 at work pressure 100mTorr and RF power of 100watt. Doing so, we could get FET which has gate length of 0.1 micrometer and the deposition and etching condition harm no damage on wafer surface. In order to find low temperature silicon nitride film deposition condition and directional etching condition, we used SEM, optical emission spectroscopy and dielectric constant measurements.
PS-ThP-19 A Study on the Polymer Residues Formation at the Via-hole and its Removal by Remote Oxygen/Nitrogen and Hydrogen Plasma
S.B. Kim, H. Soh, Y. Kim, Y.C. Kim, H. Jeon (Hanyang University, Korea)
For multilevel device fabrication, via-holes are generally dry etched for electrical connection between the upper and lower metal layers.1 The ashing and photo resist (PR) strip processes are generally followed to remove the PR and polymerized residues, respectively.2 However, the PR strip is the wet chemical process and causes environmental problems. In this study, low temperature remote plasma dry cleaning process that removes both the PR and polymer residues containing carbon and fluorine will be described. The radio frequency remote oxygen/nitrogen plasma was used to remove the PR and polymer residues simultaneously. The cleaning efficiency was systematically evaluated at various conditions such as the oxygen and nitrogen ratio, plasma power, exposure time, gas flow rate and sample temperature. The hydrogen plasma treatment was also carried out to remove polymerized residues formed at the bottom nitride layer oxygen/nitrogen plasma cleaning. In-situ Auger electron microscopy, X-ray photoelectron spectroscopy, atomic force microscope analysis systems were used to evaluate the cleaning effects and to avoid recontamination such as carbon absorption in the air. Scanning electron microscope provided a preliminary assessment of cleaning performance. Preliminary results indicated that the hydrogen plasma treatment subsequent to oxygen/nitrogen PR ashing process was very efficient to remove the polymerized residues formed at the bottom nitride.

1D. Louis, E. Lajoinie, W. Mun Lee, D. Holmes, Microelectronic Engineering, 41/42, 377-382 (1998)
2Ying Wang, Sandra W. Graham, Lap Chan, SheauTan Loong, Journal of Electrochemical Society, 144, 1522-1528 (1997)

PS-ThP-20 Studies on Photoresist Etching in Inductively Coupled Plasmas
X. Xu, P. Shoenborn (LSI Logic)
Bottom anti-reflective coatings (BARCs) are now used in applications such as gate patterning that requires the tight critical dimension (CD) control. BARC removal must be accomplished before the film (e.g. poly and dielectric) is etched. BARC etch is a critical step that can affect the final line width of the etched features. In general, an oxygen plasma with additives is used to etch BARC, in which photoresist has been trimmed simultaneously. In this work, the effect of O2/N2 and O2/He plasmas on etching of photoresist is investigated on Lam TCP 9400PTX system. The self-bias voltage on the wafer has been measured for a variety of conditions with different top source powers, bottom bias powers, gas mixtures and gas flow rates. The results show that compared to O2/N2 plasma, the self-bias voltage is lower and the etching rate of resist is higher for O2/He. Our measurements indicate that the etched products can lead to an increase of self-bias voltage with a fixed bias power. The influence of etched products is due to the decrease of the ion flux to wafers, which is shown through the use of plasma simulator, the Hybrid Plasma Equipment Model (HPEM).
PS-ThP-21 Method to Prevent Notching in Polysilicon Gate Etch Process with Long Over-Etch
W. Pau, M. Shen (Applied Materials)
In this study, we investigate the factors that can prevent notching in polysilicon gate etch process with very long over-etch. Conventionally, process optimization focuses on varying the parameters in over-etch to prevent notching. The effect of main etch and the interactions of main etch and over-etch are often overlooked. This paper explores the effect of main etch as well as the coupling between main etch and over-etch in notching elimination. The process consists of a timed main etch 1 (ME1) with CF4/Cl2/N2 chemistry followed by a HBr/Cl2/He-O2 main etch 2 (ME2) step . Then a high selectivity over-etch (OE) step uses HBr/He-O2 to etch any remaining polysilicon residue. ME2 matrix results reveal that this step plays a significant role in notching prevention. For ME2 step, a high pressure, high bias power, high HBr/Cl2 ratio and high He-O2 flow are most effective in preventing notching. For OE step, low pressure, low He-O2 flow and low source power are most effective in prevent notching. There are two main mechanisms that are responsible for notching prevention in ME2: (1) profile modification through ME2 and OE interaction and (2) sidewall passivation enhancement by ME2 only. High pressure in ME2 prevents notching through the first mechanism by having a taper profile after ME2 endpoint. This profile is then modified by OE so that a vertical profile is achieved. The effect of bias power in notching reduction, on the other hand, is attributed to the second mechanism. High bias power densifies the sidewall passivation to provide better protection at the bottom of the film, thus preventing notching.
PS-ThP-23 Chemical Mechanisms of the Etching and Non-etching of Magnetic Materials in CO/NH3 Plasmas
A.S. Orland, R. Blumenthal (Auburn University)
The etching of Fe, Ni and Co foils in CO/NH3 plasmas have been investigated using supersonic pulse plasma sampling mass spectrometry. It has been previously reported1 that plasmas based on high mole fractions of CO are observed to result in the deposition of carbide films, while pure NH3 plasmas and high NH3 content mixtures are reported to etch the metals, with a maximum etch rate of 500A/min at ~ 13% CO in NH3. Mass spectra were collected over the entire range of composition from 100% CO to 100% NH3 plasmas. In pure CO plasmas, the major plasma products that were observed are CO2, C2O2, C2O3 and C3O2. The addition of NH3 to the feed gas results in a complete elimination of the C3O2 species at ~60% CO, while C2O3 persists to ~40% CO. As the C3O2 and C2O3 disappear, a series of peaks around N4H6 appears. The CO2 signal initially decreases rapidly as the CO composition is lowered to ~60%, and then remains relatively constant until disappearing completely in the 100% NH3 plasma. The C2O2 species, believed to be a weakly bound dimer, is the only product that shows a smooth transition to nitrogen containing analogs as the NH3 percentage increases. C3O2 is well-know to act as a carbon atom donor, through successive losses of CO, and consequently, it is concluded that this species is responsible for the deposition of the carbide layer that inhibits the etching of metals in pure CO plasmas. The rapid suppression of the chemical sequence responsible for forming this species, as NH3 is added, makes etching possible for higher fractions of NH3 in the plasma.

1 K.B. Jung, et al. J. Vac. Sci. Technol. A 17(2), 535 (1999)

PS-ThP-24 Resist Trimming Process Using High Density Plasma for Sub-0.1µm MOSFET
C.Y. Sin, B.H. Chen (National University of Singapore); K. Loh, P. Yelehanka (Chartered Semiconductor Manufacturing, Singapore)
Because of the resolution limit of the 248nm lithography and immaturity of the 193nm lithography process, resist trimming process using oxygen containing gas mixture has been developed for sub-0.1microm MOSFET fabrication. In this paper, the characteristics of resists trimming in high-density plasma were investigated. Experimental results are presented to show the trimming behavior of resist as a function of RF source power, bias power, temperature, linewidth to space ratio, gas composition and reactor pressure. Effect of gas composition on trimming process were evaluated using three different gas mixtures: HBr/O2 and Cl2/O2 as well as CF4/O2. The gas mixture of CF4/O2 gives high trim, improved resist sidewall roughness and good uniformity. Studies of X-ray photoelectron spectroscopy (XPS) will be performed to determine the chemical composition of the resist sidewall passivation. The features studied comprised of alternate polysilicon lines and spaces. The amount trimmed is linearly proportional to trim time. For resist trimming, the experimental results revealed that the trimming process is of very feature density dependence. rim rate is dependent on linewidth to space ratio, but is independent of initial linewidth for the same linewidth to space ratio. Trim rate increases at low CF4 gas flow ratio and then decreases. Trim rate of 0.66microm/min can be achieved. The activation energies of trimming for dense and isolated line are found to be 0.13eV and 0.128eV, respectively, at gas composition of 100sccm CF4/30sccm O2 but have quite different pre-exponential constants, which suggests to be feature density dependence. Bias power has no significant effect on trim rate. Reactor pressure in the range from 5mTorr to 20mTorr also does not affect much the trim rate. The resist trimming process is found to be reproducible and controllable, making it a useful process for nanometer-scale device fabrication.
PS-ThP-25 The Geometric and Chemical Effect of Polymer Deposition and Etch-product Redeposition on the Etching of SiO2 Trench Sidewall in a CF4 Plasma
J.H. Min, S.W. Hwang, G.R. Lee, S.H. Moon (Seoul National University, Korea)
The effect of etch-product redeposition on the etching of SiO2 trench sidewall in a CF4 plasma was studied using a Faraday cage with a slit on the upper plane located in a transformer coupled plasma reactor. The Faraday cage with a slit allowed ions to be injected vertically on the specified portion of SiO2 bottom surface under the practical plasma condition. The effect of the bottom surface on the redeposition of the etch products on the sidewall was studied by comparing the properties of the sidewall surfaces obtained with or without the etch-product emission from the bottom surface. The trench bottom was etched at the bias voltage ranging between -200 and -600V and at the source power between 200 and 600W. The bias voltage and the source power had complex influences on the redeposition of the etch products on the sidewall because they changed the concentration of radicals, and the flux and the energy of ions injected on the bottom surface. Specifically, the bias voltage increased the redeposition rate mostly by physical sputtering, while the source power increased the rate mostly by chemical sputtering. The concentration of CF2 and F radicals increased with the bias voltage and the source power, which enhanced the polymer deposition on the sidewall. The shape of the Si-O peak in the Infrared(IR) spectrum of the redeposition film was similar to that of thermal oxide, but the Auger Emission Spectroscopy(AES) indicated that the O/Si ratio was higher for the redepsition film than for the thermal oxide. Analyses of the sidewall surface by AES and IR indicated that F radicals reacted with the oxide layer to break the Si-O bond. In the case of oxygen addition, the etch rate of the bottom surface increased but the rates of redeposition and polymer deposition on the sidewall decreased due to the enhanced production of F radicals in the plasma.
PS-ThP-26 Evaluation of High Temperature Process in W/poly Si Gate Stack Etching in a Dual Frequency Plasma Reactor
J. Hong, J.S. Jeon, C.J. Kang (Samsung Electronics, Korea)
W/poly Si stack becomes potential candidate in giga bit DRAM gate structure due to its lower sheet resistance compared to WSi/poly Si stack. Emerging process issues in W gate module are high etch selectivity of W over Si3N4 mask and poly Si stack down for self aligned contact scheme. High temperature process was evaluated in W etching to achieve high etch selectivity based on Cl2/O2 gas chemistry in a dual frequency plasma reactor. Mask loss and W profile were found to be strong function of gas ratio, process pressure and ion energy. The presence of oxygen inhibited Si3N4 mask loss by oxidation while enhancing W etching at high process temperature (150°C). Two steps W etch was developed in order to reduce the recess of poly Si in W overetch step. Poly Si recess showed a different behavior with Cl2/O2/NF3 based gas chemistry at the temperature raging from 100°C to 150°C. Recess was optimized at 120°C at the expense of mask loss and W profile. Conventional HBr based chemistry appeared to have inability to provide sidewall passivation in poly Si etching at high temperature. Gas chemistry for sidewall passivation and high selectivity over gate oxide at high temperature will be discussed.
PS-ThP-27 The Effect of Reflected Ions on the Etching of Silicon Dioxide Surface in the Fluorocarbon Plasma
G.R. Lee, S.H. Hwang, J.H. Min, S.H. Moon (Seoul National University, Korea)
In the plasma etching process, ions reflected from the sidewall surface of a deep, narrow pattern contribute to the additional etching of the other surfaces, which may be called as a secondary etching. When the aspect ratio of the etched pattern becomes high, the influence of the secondary etching on the etch profile becomes significant. In spite of its importance, however, the secondary etching due to the reflected ions has not been studied much especially under the conditions of industrial plasma processes. In many cases of the etch-profile simulation, it has been commonly assumed that ions reflect from the sidewall in an elastic-specular mode, particularly when the ion-incident angle is high. In this study, we observed the position and the extent of the secondary etching of silicon dioxide in a fluorocarbon plasma due to the reflected ions with various incident angles. The ion angles were controlled by using a Faraday cage and specially fabricated sample holders placed in a plasma reactor. The experimental results deviated from those predicted based on an elastic-specular assumption when the ion-incident angles were close to 90°. According to the analysis of the substrate surface after the plasma etching, the deviation of the ion reflection from the elastic-specular mode originated from the deposition of a fluorocarbon film on the substrate surface. The film-deposited surface became rough, and consequently ions reflected from the surface in a non-elastic, non-specular mode.
PS-ThP-28 Effect of Ion Bombardment on Developed Photoresist Morphology during Reactive Etch Processes for sub 0.25 micron Semiconductor Devices
M. Naeem, R. Wise (IBM Microelectronics Division); F. Wang (Cypress Semiconductors); G. Worth, D. Dobuzinsky (IBM Microelectronics Division); Z. Lu (Infineon Technologies); A. Hadi (Conexant)
The use of advanced resist systems has become necessary for lithography in processing of advanced (sub 0.25 µm) semiconductor devices to achieve acceptable image quality. These novel resist systems are more sensitive to both post exposure treatments as well as the ion bombardment component present in reactive ion etch (RIE) processes. We discuss the impact of resist interactions with low energy plasma and morphological changes in the resist profile. In particular, the effects of different photoresist constituents, post develop bake conditions, various RIE steps and RIE parameters in capacitively coupled plasma (CCP), magnetically enhanced RIE (MERIE) and inductively coupled plasma (ICP) systems on resist morphology and the quality of final etched images are presented.
PS-ThP-29 Study on the Low Angle Forward Reflected Neutral Beam Etching System
D.H. Lee, J.W. Bae, S.D. Park, G.Y. Yeom (Sungkyunkwan University, Korea)
Plasma etching is one of the key technologies in the fabrication of deep submicron silicon based integrated circuit. However, plasma etching could give serious disadvantages due to the energetic charged particles generated in the plasma which cause radiation damage such as physical defect, increased gate oxide breakdown, charging, etc. To avoid these charge-related and physical impact-related damages, several low-damage processes have been proposed. One possible alternative to avoid these problems is a low energy neutral beam etching. In this study, neutral beam has been generated using a low angle forward reflected neutral beam and its characteristics such as the degree of neutralization, etch characteristics, etc. have been studied as a possible anisotropic etching technique without charging. When the reactive ion beam was reflected on a reflector at the angles lower than 15°, most of the ions reflected were neutralized and also the lower reflector angle showed the higher degree of neutralization. Complete removal of the ions in the reflected beam could be accomplished by installing a retarding grid system between the sample and the reflector and by applying a potential higher than the maximum ion energy of the flux. This reflected neutral beam source has been devised to be scaleable to a large diameter and also to etch polymer and SiO2 anisotropically. In order to obtain a large flux from the ion source, inductively coupled plasma was used as the plasma source and specially prepared extraction grids which have very dense and small holes were used. Details of the developed neutral beam source and its properties will be discussed in addition to the etch characteristics obtained using the low angle reflected neutral beam source.
PS-ThP-30 Highly Selective Etching of Al/AlN Structures for Metallization of SAW Devices
F. Engelmark, I.V. Katardjiev, G.F. Iriarte (Uppsala University, Sweden)
Metallization is a critical step in the fabrication of high frequency thin AlN film based SAW devices. Both state-of-the-art lithography as well as high selectivity and anisotropy during etching of Al with respect to AlN are required for low loss and high performance devices. In this work, the etch rates of reactively sputtered AlN, sputtered Al, thermal SiO2 and Shipley 1813 photo resist as well as the selectivity between Al/AlN, Al/SiO2 and resist/Al have been systematically studied during ICP RIE. Emphasis is focused on obtaining high Al etch rates, while at the same time keeping the etch rate of AlN and that of the resist sufficiently low. High anisotropy is obtained by passivating the sidewalls by the addition of oxygen. The recipe developed is based on a modified Al etch using a mixture of BCl3, Cl2, O2 and Ar. The parameters varied were gas composition, process pressure, substrate bias and ICP power. Generally it is found that the Al etch rate exhibits a maximum with the O2 flow, while the AlN etch rate decreases monotonically. Substrate bias is found also to be an important parameter with respect to both etch rates and selectivity. At optimized conditions (500 W ICP power, 35 W chuck power, 50 sccm BCl3, 25 sccm Cl2, 10 sccm O2, 0 sccm Ar, pressure 10 mTorr) the Al etch rate is 1700 nm/min with a selectivity of 58 towards AlN and 10 towards the resist. The same recipe, slightly modified, has also shown similar Al etch rates when etching Al over SiO2 with a selectivity of up to 180. High anisotropy of the Al etch rate is observed with increasing O2 flow. The former has been determined from cross-sectional SEM observations.
PS-ThP-31 W/WNx/Dual-Poly Stack Gate Etching for 0.15 µm Tech. Full CMOS SRAM
B.-K. Lee, Y.-J. Choi, I.-K. Yang, I.-S. Seo, H.-S. Shin, H.-S. Yang (Hynix Semiconductor Inc., South Korea)
As SRAM cell composed of pMOS and nMOS is scaled down to deep submicron regime, the surface channel pMOS with p+ poly Si gate is a key technology to realize high performance full CMOS SRAM device, because of its strong immunity to short channel effect. Another important issue to be considered with scaling down of the device is reduction of resistance-capacitance delay along channel width. The W/WNx/Dual-Poly stacked-gate electrode is promising method for these requirements. In the present study, we investigated the effect of gas chemistry on the W/WNx etching characteristics such as profile angle, surface morphology of poly Si and selectivity of the W/WNx over SiON hard mask and poly Si, respectively. Physical features were analyzed with SEM and TEM, and electrical properties were measured. The surface analysis of etched W/WNx film with XPS and plasma analysis with L/P(Langmuir Probe), OES(Optical Emission Spectroscopy), RGA(Residual Gas Analysis), and Posi-SIMS were also performed. When Cl2 was added to NF3, the laternal etching in W/WNx was suppressed due to increase of polymerization. In addition, the selectivity of the W/WNx over SiON was improved by the increase in etch rate of W/WNx and also the decrease in that of SiON induced from the change of plasma state. In case of Ar and O2 addition, the selectivity of W/WNx over poly Si was increased, and consequently sublayer poly Si loss was reduced during over etching. Finally, the addition of CF4 to NF3 made the surface morphology of poly Si smooth resulting from more uniform W/WNx etching during the over etching. On the basis of these results, W/WNx/Dual Poly stack gate etch process having a vertical profile, no sub Si attack and no residue could be achieved with NF3/Cl2/CF4/O2 gas for W/WNx etch and with HBr/Cl2/O2 gas for poly Si etch for 0.15 Tech. SRAM and beyond. Keywords: etching, tungsten, dual gate, SRAM, surface channel pMOS.
PS-ThP-32 Trimming Photoresist in a DPS(TM)II 300mm Poly Etch System - Control of Trimming Rate, Uniformity and Stability
M. Shen, O. Yauw, N. Gani, C. Lin, Y. Lai, M. Chu (Applied Materials)
As the IC industry aggressively moving towards 0.10um gate length devices, requirements on CD control become increasingly difficulty to meet. Resolving 0.10um line width with great accuracy and uniformity on 300mm wafer is a major challenger for conventional photolithography technology. Therefore, trimming photoresist through etching has become a very attractive alternative to speed up the road map towards 0.10um technology using existing photolithography. Resist trimming, however, requires strict control of trimming rate, uniformity and stability. Trimming linearity is another important element for precise CD control. With integrated CD metrology approach, it is possible to adjust the trimming time based on in-coming wafer to obtain desired final CD for each wafer. The study presented here outlines some of the development works for resist trimming process on Applied Materials DSP(TM)II 300mm poly etcher system. Trimming up to 30nm with less than 5nm in range uniformity has been achieved on 300mm wafers. Excellent CD uniformity controls on overall process involving trimming, hardmask and polysilicon gate were demonstrated on DPS(TM)II 300 system.
PS-ThP-33 Effects of Gas Chemistry of Inductively Coupled Plasmas on the Multi-Layer Gate Metal Etching Characteristics for TFT-LCD Devices
Y.J. Lee, C.H. Yi, B.K. Song, M.J. Chung (Sungkyunkwan University, Korea); M.P. Hong (Samsung Semiconductors, Korea); G.Y. Yeom (Sungkyunkwan University, Korea)
For advanced TFT-LCD manufacturing processes more conductive gate materials are required for the next generation large size and the high quality of thin film transistor liquid crystal displays (TFT-LCDs). For gate metal layer, single gate metals such as Al-Nd and Ag, and double gate metals such as Al-(Cr, Mo, MoW, or W) are widely studied. Currently, the patterning of gate metals is done by wet etching methods. With the wet etching method, however, the tapered patterning of Al-alloy mentioned above is nearly impossible. Also, most of the capacitively coupled RIE-type equipments available for FPD devices are suffered from relatively low plasma densities, therefore, low etch rates. Therefore, in this study, the tapered etching of multi-layer gate metals such as Ag, Al-Nd, and double gate metal films (Al-Cr, Mo, W, or MoW) deposited on glass substrates were studied using high density inductively coupled plasmas (ICP) and the etch characteristics were investigated as a function of gas combination, pressure, dc self-bias voltage, and inductive power. Chlorine and bromine-based gas were used with N2, O2, and Ar as additive functional gases. Depending on the materials, the different etch rates were obtained for the same process parameter condition. For example, the etch rates close to 1500Å/min could be obtained using BCl3/HBr chemistry for Al-Nd etching and the etch selectivity over photoresist was close to 1. The low etch rates were attributed to the Nd in Al. Using the plasma diagnostic tools such as optical emission spectroscopy and quadruple mass spectroscopy, the etching mechanisms of various gate metal layers with these chemistries were investigated. Variations of surface composition for various gas mixtures were also investigated using X-ray photoelectron spectroscopy. The etch profiles and surface defects were observed with a scanning electron microscope.
PS-ThP-34 The Influence of Ar Flow Rate on Photoresist Selectivity in High Density Plasma Etching of SiO2
E. Haikata, S. Sasaki, T. Yoshida, K. Nojiri (Lam Research Co., Ltd, Japan)
As dimension of LSI becomes smaller, higher photoresist selectivity to SiO2 is required in high-aspect-ratio contact hole etching, because photoresist mask becomes thinner to get enough resolution. Although C4F8/Ar/O2 gas chemistry is widely used for SiO2 etching, the influence of Ar flow rate on photoresist selectivity is not clear. This paper presents the influence of Ar flow rate on photoresist selectivity and etching profile along with the discussion on the basis of XPS and OES analysis. In the experiment, Ar flow rate was changed from 50 sccm to 500 sccm in Transformer Coupled Plasma Etcher, with C4F8/O2 flow rate kept constant. With increasing Ar flow rate, photoresist selectivity increased because the photoresist etch rate decreased drastically, while the SiO2 etch rate decreased only slightly. In contrast, at low Ar flow rate, photoresist selectivity dropped remarkably at small diameter holes due to RIE Lag, and etch stop was observed. XPS data showed that polymer deposited on the photoresist at high Ar flow rate contained more C-C and C-CFx chain, and it was more C rich. From OES results, C2/CF2 ratio increased as Ar flow rate increased. Since C radical has higher sticking coefficient than CF2 radical, C is thought to deposit at the upper part of the contact hole and photoresist surface, leading to higher selectivity because C rich polymer has high resistance to plasma attack.On the other hand, CF2 is thought to go into inside of the hole, causing etch stop at low Ar flow rate. We conclude that high Ar flow rate has advantage of wider etch stop margin and higher photoresist selectivity.
PS-ThP-35 Novel Organic Low-k Dielectric Etching by Using CH3NH2 / N2 Plasma
H. Nakagawa (Matsushita Electric Co., Ltd., Japan); Y. Morikawa, T. Hayashi (ULVAC JAPAN Ltd.)
A Novel organic low-k etching has been developed by using a new gas chemistry of CH3NH2 / N2 in a neutral loop discharge (NLD) plasma system. The organic low-k etching produces normal taper profile, no micro-trench, and small hard-mask erosion, which required for fabricating Cu / organic low-k damascene multilevel interconnects. The concept of etching is to introduce C-H passivation film with appropriate thickness on sidewall and bottom of etched patterns, and employing CH3NH2 / N2 has led to the achievement of the required performance. Furthermore, we can control the taper angle of the etched profile by changing a flow ratio of CH3NH2 / N2 and N2 in this chemistry. We have already reported that the via hole etching with normal taper profile, no micro-trench and small hard-mask erosion is obtained by using a gas mixture of CH4 / N2 in neutral loop discharge (NLD) plasma.1 In this chemistry, we were able to obtain only slight taper angle and small etch rate of photo-resist (PR) mask. The organic low-k etching by CH3NH2 / N2 plasma, however, has also overcome the problems which were not achievable in the etching by CH4 / N2 plasma. In this presentation, we will discuss the concept of etching gas chemistry design and the etching mechanism on the basis of both QMS measurement results of plasma gas phase and composition evaluation results of the deposition film formed on the Si wafer surface during etching.

1 H. Nakagawa et al, Tech. Dig. of Dry Process Symposium, Tokyo, 257 (2000).

PS-ThP-36 Low Temperature Etch Characteristics Using 193 nm ArF Photoresist Below 0.1µm Device
W.S. Lee (Samsung Electronics, South Korea); J.W. Shon, B.K. Kong (Lam Research Corporation); J. Kim, E.S. Chae (Samsung Electronics, South Korea)
Patterning sub 0.1 micron devices require a photoresist (PR) that is extremely photosensitive to short wavelength such as 193 nm ArF PR. However, etch problems associated with ArF PR includes higher etch rate, less selectivity, less PR thickness due to increasing opacity at shorter wavelength. For a nitride hard mask etching, process results are sensitive to process temperature. SEM pictures obtained from hard mask open process show notable improvements at -20°C. Wafer temperature measurements suggest that bulk wafer temperature is only about 10°C higher that chiller temperature. However, surface of PR could heat up to much higher than that of bulk wafer temperature, which could cause PR deformation.
PS-ThP-37 0.1µm Line and Space Nitride Hard Mask Open Process Using Ar/C2F6/O2 Plasma
W.S. Lee (Samsung Electronics); J.W. Shon, B.K. Kong, E.A. Hudson (Lam Research Corporation)
Traditional line and space nitride hard mask open process uses Ar/CF4/CHF3/O2 recipes. The process chemistry using both CF4 and CHF3 combination provides excellent CD control with controllable amount of polymer needed for 0.14 micron and larger devices. However, as the feature size shrinks to 0.1 micron, better PR selectivity and CD control are required. Using C2F6 based recipe, we can double PR selectivity with minimum penalty in CD blow out. We have developed C2F6 based nitride hard mask open recipe in comparison to the baseline CF4 recipe. PR selectivity and profile are much better compared to CF4 based recipes. We are reporting process trends for C2F6 based line and space nitride hard mask open process with respect to total power, power ratio, effects of adding polymerizing gas, and striation issues.
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