ALD/ALE 2025 Session NS-MoP: Nanostructure Synthesis and Fabrication Poster Session

Porous silicon templates have attracted increasing attention because of their controllable geometry, tunable nanoporous structure, large pore volume/high specific surface area, and versatile surface chemistry. Porous templates show significant advantages and application potential in microfluidics, electro-osmotic pumps, biomedical drug delivery, sensing, photonics, integrated opto-electronics, energy conversion, thermoelectrics, thermo-acoustics, electronics and Lab-on-a-chip technology for biomedical, pharmaceutical and environmental monitoring. For this study we have focused on energy conversion with ALD lead chalcogenide PbTe film coatings since PbTe is a useful narrow band gap thermoelectric material that can operate at comparatively higher temperatures in the range of 600~850 K due to its better chemical stability and high melting point. PbTe thin films have been synthesized inside of porous silicon templates with native oxide by Atomic Layer Deposition (ALD) using lead (II)bis(2,2,6,6-tetramethyl-3,5-heptanedionato) (Pb(C₁₁H₁₉O₂)₂), (trimethylsilyl) telluride ((Me₃Si)₂Te) as ALD precursors for lead, and tellurium. The Si native oxide surface was functionalized before ALD PbTe thin film deposition to ensure reproducible chemisorption of the ALD precursor compounds. The growth temperature during ALD was varied over a range from 135^oC to 170^oC. The Lead precursor was volatilized at a temperature of 140 ^oC and the Tellurium precursor was heated at 40 ^oC. The chamber base pressure was kept at 40 mTorr.Several physical characterization techniques have been employed to determine the ALD PbTe thin film characteristics. The crystal structure and phase purity of samples of PbTe films were analyzed by X-ray diffraction (XRD). The film morphology and structure of the products were determined by field emission scanning electron microscopy (FE-SEM) and high-resolution transmission electron microscopy (HR-TEM). The surface roughness was analyzed by atomic force microscopy (AFM). The analysis of the composition and stoichiometry of the ALD coatings were carried out by Energy dispersive X-ray spectroscopy (EDS). The experimental evidence revealed the ALD growth of lead telluride followed the Vollmer-Weber Island growth model. We found a strong dependence of the nucleation process of the polycrystalline grain distribution on the temperature.We report a systematic study of all ALD parameters required to optimize the coating of the interior walls of porous membranes which open front and backside, straight pores of varying diameter and porosity with dead endings in the substrate and pores with spatially modulated ondulating cross sectional shapes.

Improving thermoelectric material performance is essential for energy harvesting and solid-state cooling applications. This study demonstrated a novel structure of Bi₂Te₃-based thermoelectric materials with ZnO nanowire-bundled grain boundaries, realized via atomic layer deposition (ALD) and subsequent spark plasma sintering (SPS). The ZnO nanowires formed at the interfaces due to the rearrangement of the ALD-grown ZnO ultrathin layer over Bi_0.4Sb_1.6Te₃ powder, driven by localized heating during the SPS process and the anisotropic nature of ZnO. The nanowire-bundled interfaces enhanced phonon scattering, thereby reducing lattice thermal conductivity while maintaining excellent electronic transport. This structural innovation achieved a high figure-of-merit, zT_max = 1.69 ± 0.09 at 373 K and an average zT of 1.55 over the range of 300–473 K. A thermoelectric module fabricated with 127 p–n pairs achieved a record-high conversion efficiency of 6.57% at a temperature difference of 163 K. These findings highlight the potential of nanowire-bundled interfaces to enhance the thermoelectric material performance and pave the way for scalable next-generation energy conversion technologies.

Two-dimensional transition metal dichalcogenides (2D TMDCs) have emerged as promising semiconductor materials for next-generation electronic devices due to their high mobility within atomic-scale thickness. To preserve the superior performance of 2D semiconductors in field-effect-transistor (FET) applications, gate dielectrics should be deposited via physisorption to prevent chemical reactions between the atomic-scaled 2D surface and ALD precursors.^[1] A straightforward approach to achieving this is reducing the deposition temperature; however, this is often accompanied by the formation of lower-quality gate dielectrics. It is thus essential to establish alternative strategies for gate dielectric deposition, such as exploring precursors and/or employing advanced ALD techniques.

This study will present a promising approach utilizing H₂O₂ as an oxidant source for gate dielectric deposition, along with a strategy to achieve uniform deposition without damaging 2D materials. Comparative studies were conducted using H₂O, O₃, and H₂O₂ for high-k HfO₂ growth on 2D MoS₂. Each oxidant exhibited distinct growth behaviors. While O₃ facilitated uniform HfO₂ deposition, its strong oxidation effect led to Mo-S bond conversion into Mo-O bonds, inducing damage to the MoS₂ surface. The resulting surface damage led to degraded FET device performance, indicating that O₃ cannot be a viable candidate for high-k dielectric deposition on 2D semiconductors. For H₂O and H₂O₂, achieving fully conformal coverage remains a significant challenge. To address this limitation, stop-valve techniques were employed to extend oxidant exposure time and dosage, effectively enhancing dielectric coverage while maintaining interface integrity. The interface properties were further analyzed using a top-gate FET structure,^[2] providing insights into the interface trap density associated with different oxidants.

This presentation will cover material characterization, ALD techniques, and electrical performance, offering a comprehensive evaluation of oxidant effects on 2D semiconductor integration.

This work was supported by Samsung Electronics through GRO program (IO240612-10229-01). We gratefully acknowledge TMEIC for ozone generator (OP-250H) and RASIRC for BRUTE^® Peroxide. S. E. Yu acknowledges KIAT/MOTIE (RS-2024-00435406).

[1] S. Yang et al., Adv. Mater. 35, 2207901 (2023). [2] Y. C. Lin et al., IEEE Trans. Electron Devices 70, 1598-1613 (2023).

Metal germanates such as Zn₂GeO₄, Fe₂GeO₄, and Co₂GeO₄ have been widely studied for various applications, including catalysts, sensors, lasers, and batteries. Cu₂GeO₄ has recently emerged as a promising candidate for lithium-ion battery anodes and sensor technologies, owing to its high mechanical strength, structural stability, and potential for enhanced electrochemical performance. However, traditional synthesis methods for Cu₂GeO₄ despite its promising properties, the synthesis of Cu₂GeO₄ remains challenging, with traditional methods often requiring high temperatures or complex multi-step processes. In this study, we introduce a simple and effective hydrothermal method for synthesizing carbon coated Cu₂GeO₄ nanoparticles. The size distribution of CuGe₂O₄ nanoparticles were in the range of 20 to 50 nm, as observed through scanning electron microscopy (SEM), and their structure was confirmed as tetragonal by X-ray diffraction (XRD) (JCPDS 83-1872). Raman spectroscopy indicated the presence of crystalline Ge, supporting the material’s structural integrity. These Carbon coated Cu₂GeO₄ nanoparticles show significant potential for lithium-ion battery anodes where their enhanced chemical and mechanical stability, and electrochemical performance offer significant advantages over conventional materials.

We report a wafer-scale, low-temperature process using thermal atomic layer deposition (ALD) with sequential flows of BCl₃ and NH₃ for the synthesis of uniform, conformal amorphous boron nitride (aBN) thin films on Si and 2D semiconductors. The deposition temperatures of aBN between 125 and 250 °C lead to stoichiometric BN films with high stability against oxidation and yield a dielectric strength of 8 MV/cm. The impact of ALD processing parameters on the resulting morphology, atomic compositions, and structural properties of aBN on Si was evaluated. Furthermore, we present the ALD of ultrathin (2–20 nm) aBN as a scalable and non-water-based process for dielectric integration with 2D semiconductors. The lack of nucleation sites on van der Waals surfaces to form thin, uniform dielectric layers could lead to interfacial defects that degrade the device performance. Therefore, by utilizing two-step approach including in situ seeding at lower temperature and carrying out ALD back at regular temperatures, we were able to form uniform aBN dielectric layers on 2D surfaces and fabricate few-layer quantum well structures made of aBN/MoS₂ building blocks and aBN-encapsulated double-gated monolayer MoS₂ field-effect transistors to investigate the impact of aBN dielectric on MoS₂ properties. Our work in scalable aBN dielectric integration provides a means for improving the performance of 2D materials for next-generation electronics.