ALD/ALE 2025 Session ALE1-WeM: Plasma and/Energy-Enhanced ALE + Sustainability

Recent progress in the field of artificial intelligence has also highlighted the critical role of semiconductor manufacturing in delivering the necessary compute requirements. Simultaneously, the prospect of future proliferation of such technologies presents serious ramifications for the environment. Examinations of the increases in resource consumption as both software [1] and hardware [2] advance have raised awareness of the need to consider the sustainability of future development. In this talk we will examine this idea as it pertains to plasma-enhanced atomic layer etching (PE-ALE), building off our recent work on reducing gas usage in deep Si etching. [3] We review new results studying mechanisms of halogen substitution on Si surfaces and the need for synergy between all facets of the development process, from substrate materials to gas precursor development. Adopting this focus as soon as possible will strengthen the fundamental role of atomic layer processes in enabling future technologies.

[1] E. Strubel et al., Energy and Policy Considerations for Deep Learning in NLP, Proc. of the 57th Annual Meeting of the Association for Computational Linguistics, 2019, pp. 3645–3650, Florence, Italy.

[2] M.G. Bardon et al., DTCO including sustainability: Power-performance-area-cost-environmental score (PPACE) analysis for logic technologies, IEEE International Electron Devices Meeting (IEDM), 2020, pp. 41.4.1-41.4.4, San Francisco, CA, USA.

[3] O. Isowamwen et al., Characterization of TSV Etch from a Sustainability Standpoint, Proc. SPIE 12499, Advanced Etch Technology and Process Integration for Nanopatterning XII, 2023, 124990H, San Jose, CA, USA.

The continues reduction of the chip size and development of innovative 3D integrated device architectures have required the adoption of advanced processing methods. Plasma-assisted atomic layer etching (PE-ALE) has emerged as a promising technique for sub-nanoscale material removal in semiconductor processes due to its unique self-limiting surface reactions. Cryogenic plasma etching enabling the unique feature of physisorption of neutrals/condensed layer has been reported for ALE of dielectric materials [1]. Our recent reports indicates that the cryogenic plasma etching can significantly enhance the etching throughput of SiO₂ through the co-adsorption of H₂O/HF species using the CF₄/H₂ gases [2]. Building on this, we developed the cryogenic ALE (Cryo-ALE) process involving an HF dose for surface modification and Ar ion bombardment for SiN etching. This work extends the Cryo-ALE process to SiO₂, utilizing an HF/C₂H₅OH dose for etchant physisorption followed by an Ar ion bombardment. In situ monitoring techniques, including spectroscopic ellipsometry and attenuated total reflectance Fourier transformation infrared spectroscopy (ATR-FTIR), were used to analyze the surface structure and etching characteristics. The substrate temperature (T_s) was controlled from 20 to –60 °C using a coolant circulating system connect to the bottom electrode. The etched depth per cycle (EPC) of the SiO₂ after the process increased from approximately 0.28 nm/cycle to 0.79 nm/cycle as the T_s was decreased from 20 to –60 °C. (see supplemental document for details). ATR-FTIR analysis revealed that this increase in EPC correlates with an enhanced amount of surface-adsorbed HF/C₂H₅OH during the surface modification step. Conversely, the EPC vs T_s for the SiN exhibited an opposite trend, indicating that the etching selectivity between SiO₂/SiN can be effectively tuned by adjusting T_s.

[1] D. N. Shank et al., J. Vac. Sci. Technol. A 41, 052601 (2023).

[2] S. N. Hsiao et al., Small Methods, 2400090 (2024).

[3] S. N. Hsiao et al., Chem. Mater. 36, 11042 (2024).

Cryogenic Atomic Layer Etching of SiO₂ (“Cryo-ALE”) has been developed several years ago to address some limitations when it is performed at room temperature.The ALE process achieved under these last temperature conditions involves a C₄F₈ plasma in the modification step. This results in fluorocarbon deposition on the reactor walls, and eventually to process drifts, which affects reproducibility. Consequently, chamber cleaning is necessary. This can be addressed by flowing C₄F₈ in gas phase and cooling the SiO₂ substrate at cryogenic temperature. C₄F₈ molecules are physisorbed only on the cooled surface and therefore, wall pollution is greatly reduced. The thin physisorbed C₄F₈ layer is then used as a reservoir to etch around one SiO₂ monolayer in the subsequent Ar plasma of one ALE cycle.

Alternatively, a relevant approach consists in selecting a gas with a higher F/C ratio, which polymerizes much less than low F/C ratio gases such as C₄F₈. For instance, a CF₄ plasma is in etching regime at room temperature and does not promote polymer deposition on the chamber walls at room temperature too. Nevertheless, it is shown by absorption spectroscopy that the sticking coefficient of CF radicals increases dramatically when the surface is cooled at cryogenic temperature. This means that a CF₄ plasma can be used to deposit a fluorocarbon layer only on cooled surfaces, in particular SiO₂. But the chamber walls, at room temperature, are polymer-free.

Consequently, a CF₄ plasma can be used as a modification step in a SiO₂ Cryo-ALE process. It is demonstrated that repeating cycles of a CF₄ plasma step followed by an Ar plasma with low energy ion bombardment, with each cycle separated by a purge step, enables sequential etching of SiO₂ cooled at cryogenic temperature. The EPC increases as the substrate temperature decreases and reaches 0.46 nm/cycle at -130°C. This process, provided deposition during CF₄ plasma is well balanced with etching in the Ar removal step, exhibits a high synergy that can approach 100%.

Acknowledgments: The authors thank Tokyo Electron Limited for financial support and helpful discussions and acknowledge ANR, which
supports the project PSICRYO for “Understanding Plasma-Surface Interactions in CRYOgenic etching for advanced patterning applications” (No. ANR-20-CE24-0014). This work was also supported by CERTeM platform, which provides most of the equipment.

The Oxide semiconductors (OSs), which utilize materials like IGZO as channel layers, have been gaining increased attention as the demand for high mobility and low off - current in semiconductor devices continues to grow.Especially, InOx is emerging as a key material for next-generation devices due to its outstanding electron mobility. Achieving these characteristics requires high-quality thin films, which can be precisely and uniformly fabricated using atomic layer deposition (ALD), a technique essential for high-mobility InOx and next-generation device applications. While ALD enables precise deposition, achieving the desired crystallinity in InOx at low thickness remains challenging due to issues like nucleation and non-uniform film growth. To address this, an etch-back process using Atomic Layer Etching (ALE) is often employed, depositing the film to the required properties before selective removal. However, in the case of InOx, the low volatility of modified byproducts like InCl₃ or InF₃ makes their removal chemically difficult, posing significant limitations to the applicability of ALE technique

In this study, we explored the operation of Atomic Layer Etching (ALE) for InOx by incorporating an additional hydrogen treatment modification step into the conventional ligand-based ALE process using Hacac (acetylacetone). The process was evaluated through Spectroscopic Ellipsometry (SE), X-ray Photoelectron Spectroscopy (XPS), and X-ray Diffraction (XRD) to determine whether the ALE cycles proceeded in a layer-by-layer manner driven by self-limiting reactions. The findings showed that the thickness of the indium oxide thin film could be controlled with precision, while an improvement of approximately 37% in RMS roughness was observed, indicating better film quality after the ALE process. Furthermore, XPS and XRD analysis confirmed that the bulk chemical composition remained unchanged following the hydrogen modification step, suggesting that the mechanism effectively induced reactions at the surface level. These results provide useful insights into controlling oxide semiconductor deposition and improving thin-film quality for potential device applications.

The relentless pursuit of miniaturization in the semiconductor industry, characterized by sub-10 nm feature sizes, 3D stacked architectures, and complex gate-all-around (GAA) structures, demands increasingly sophisticated plasma processing techniques. These advanced applications require plasma sources capable of operating over a broad pressure range while providing a high radical density with minimal ion-induced damage to delicate device structures.

To address these critical requirements, we have developed a novel ignitor-free remote plasma source utilizing a magnetic core configuration. Preliminary test with argon and argon-nitrogen gas mixtures demonstrates a stable operating pressure range of 0.1 to 17 Torr and 0.1 to 4.5 Torr, respectively.

Furthermore, this source exhibits a unique capability for plasma mode transition. By adjusting the magnetic core's winding ratio, the plasma can be dynamically transitioned between voltage mode and current mode operations. This flexibility allows for optimized process control, enabling the generation of high radical density for rapid etch rates in current mode, while minimizing ion bombardment for delicate deposition processes in voltage mode. Optical emission spectroscopy (OES) measurements confirm a significant enhancement in radical density in current mode compared to voltage mode.

Based on these promising results, ongoing efforts are focused on optimizing the plasma reactor, magnetic core geometry, and radio frequency (RF) generator to further enhance the performance and versatility of this innovative plasma source for advanced semiconductor manufacturing applications.