ALD2018 Session AA-TuA: Active Matrix Device and Material
Session Abstract Book
(305KB, May 5, 2020)
Time Period TuA Sessions
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Abstract Timeline
| Topic AA Sessions
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| ALD2018 Schedule
Start | Invited? | Item |
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4:00 PM | Invited |
AA-TuA-11 Amorphous In-Ga-Zn-O Thin-Film Transistor-Based Nonvolatile Memory Devices
Shi-Jin Ding (Fudan University, China) In recent years, amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) nonvolatile memor ies have been widely researched as next-generation memory devices for flexible electronic systems and transparent panel systems. This is because a-IGZO has many advantages over conventional amorphous or polycrystalline silicon, such as high electron mobility, good uniformity, low processing temperature, and transparency in the visible region of the spectrum. In this talk, I will talk about several types of a-IGZO TFT memory devices: (1) the a-IGZO TFT memory device with ALD Zn-doped Al2O3 charge storage layer. It exhibited fast programming characteristics and very good electron retention. The light emitting from a halogen tungsten lamp could be used to erase the programmed device, and the monochromatic light-assisted electrical erasing could increase the erasing efficiency, which was further enhanced with reducing the wavelength of the monochromatic light; (2) The a-IGZO TFT memory device with ALD Pt or Ni nanocrystals. It exhibited a high programming efficiency, and the programmed device could be erased efficiently by UV light or bias-assisted monochromatic light; (3) multi-level cell a-IGZO TFT memory with an IGZO or ALD ZnO charge trapping layer. When the fresh device was programmed at a positive or negative gate bias, a positive or negative threshold voltage shift was obtained compared with the fresh device. Therefore, a large memory window was achieved at relatively low operating voltages. Moreover, the memory device demonstrated electrically programmable and erasable characteristics between different states as well as good data retention. In conclusion, the above memory devices could have promising applications in one-time programmable memory, light-erasable memory, UV detectors and electrically programmable and erasable memory. |
4:30 PM |
AA-TuA-13 Atomic Layer Deposition of Elemental Tellurium for Composition Tuning Of Ovonic Threshold Switching Materials
Stephen Weeks, Gregory Nowling, Valerio Adinolfi, Vijay Narasimhan, Karl Littau (Intermolecular, Inc.) Recent work on resistive switching based non-volatile memory (NVM) technologies has shown their potential for use in next generation data storage applications. In these next generation applications, NVM devices are required to be packed densely in cross-bar memory arrays that require a selector device, such as the ovonic threshold switch (OTS), in series with the memory element to minimize parasitic currents in the memory array.1 To be cost competitive, the NVM architecture must also be of a high areal density, making three dimensional (3D) integration of both the memory and selector active layers attractive. To obtain this, there is a need for the development of atomic layer deposition (ALD) processes for the materials used in both the memory and selector elements deployed in these memory arrays. In this work, we focus on the GeTex material system. This system is known to exhibit phase change memory (PCM) behavior near the GeTe composition2 and OTS behavior at the GeTex(x=4-6) compositions.3,4 While a number of processes have been reported demonstrating the ALD of GeTe,5,6 to date no report exists of ALD for the OTS relevant range of this material system, GeTex(x=4-6). Here, we report for the first time the ALD of elemental tellurium and use this process to tune the composition of GeTex. Elemental Te ALD was accomplished by reacting [(CH3)3Si]2Te with the alkoxide Te(OC2H5)4. The Te deposition was observed to be conformal (see supplemental information). We discuss growth and nucleation behavior of ALD Te observed on Si, TiN, and GeTe substrates. Beyond this, we report the development of a TeO2 ALD process utilizing Te(OC2H5)4 and H2O to encourage Te growth on surfaces where island like nucleation is observed to limit film closure. Finally, we deposit ALD GeTe using the recently reported HGeCl3+[(CH3)3Si]2Te process of Gwon et al.6 and utilize the ALD Te process to increase the Te content of the film to compositions relevant for OTS applications. These results provide a pathway towards using conformal elemental Te to tune the composition of chalcogenide films deployed in PCM and OTS applications using an all ALD approach. References: 1) A. Chen, Solid State Electronics 2016, 125, 25. 2) L. Perniola et al., IEEE Electron Device Lett. 2010, 31, 488. 3) M. Anbarasu et al., Appl. Phys. Lett. 2012, 100, 143505. 4) A. Velea et al., Scientific Reports 2017, 7, 8103. 5) V. Pore, T. Hatanpaa, M. Ritala, M. Leskela, J. Am. Chem. Soc. 2009, 131, 3478. 6) T. Gwon, et al., Chem. Mater. 2017, 29, 8065. View Supplemental Document (pdf) |
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4:45 PM |
AA-TuA-14 Plasma Enhanced Atomic Layer Deposition of Low Temperature Silicon Nitride for Encapsulation Layer using Novel Silicon Precursor
SungGi Kim, SeJin Jang, JeongJoo Park, HeeYeon Jeong, Joong-Jin Park, GunJoo Park (DNF Co. Ltd); Sang-Ick Lee (DNF Co. Ltd, Republic of Korea); Myong-Woon Kim (DNF Co. Ltd) OLED(Organic Light Emitting Diode) has characteristics of self-emission, high-speed response, wide viewing angle, ultra-thin type, and high image quality, and is the spotlight in the display field. However, in the case of an OLED device, there is a problem that the lifetime is shortened and the device performance is lowered due to deterioration and oxidation of a light emitting material and an electrode material due to oxygen and moisture. In order to overcome these disadvantages, encapsulation techniques capable of blocking oxygen and moisture are very important in OLED devices. Recent thin encapsulation technology and hybrid encapsulation technology in flexible OLED panels. Thin film encapsulation technology is used by laminating organic film, inorganic film or inorganic film. Typical inorganic films include Al2O3, SiO2, and SiNx. In this paper, a silicon nitride film was deposited with NH3 and N2 PEALD (plasma enhanced atomic layer deposition), using a new silicon precursor (Figure 1) on PEN (polyethylene naphthalate) films at various RF time conditions. The PEALD one cycle is made of 6 steps (Si precursor - Purge - NH3 Reactant - Reaction Purge - N2 Reactant - Reactant Purge) and the deposition temperature is 90℃. The encapsulation layer property was measured by WVTR(Water Vapor Transmission Rate) using a MOCON AQUATRAN Model 2 and the measurement time is over 100 hours. The deposited silicon nitride film with a 300Å thickness showed excellent WVTR characteristics below 1.00 x 10-4 g/m2·day. It looks like a saturation behavior at above 300Å thickness, but we expect to be lower. Because it was measured below the detection limit (1.00x10-4g/m2•day) of MOCON AQUATRAN Model 2. View Supplemental Document (pdf) |
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5:00 PM |
AA-TuA-15 Atomic Layer Delta Doping and Deposition of Ultrathin Metallic TiN-based Channel for Room-temperature Field Effect Transistor
Yu-Tung Yin, Po-Hsien Cheng, Chun-Yuan Wang, Teng-Jan Chang, Tsung-Han Shen, Yu-Syuan Cai, Miin-Jang Chen (National Taiwan University, Republic of China) Under sub-10 nm technology node, the metallic channel transistors have been proposed as one of the possible candidates. However, the conductivity modulation in metallic channels can only be observed at low temperature, which is usually below 100 K. By using the atomic layer delta doping and deposition (AL3D) technique, the thickness and electron concentration of oxygen-doped TiN metallic channel has been precisely controlled, and the room-temperature field effect and modulation of the channel conductivity on TiN metallic channel were achieved in this study. The reduction in electron concentration and the blue shift of absorption spectrum were observed with the decrease of the channel thickness, which can be explained by the onset of quantum confinement effect. Similarly, the oxygen incorporation using the AL3D tehnique also results in the reduction in electron concentration and the blue shift of absorption spectrum, which can be deduced from the increase of the interband gap energy due to the oxygen oncorporation. Since the electron concentration was significantly modulated by the AL3D process, the screen effect was dramatically suppressed in the oxygen-doped TiN metallic channel. In addition, owing to the quantum confinement effect and the suppressed screening effect, the modulation of channel conductivity from the gate electric field can be achieved at room temperature in the precisely controlled oxygen-doped TiN ultrathin-body channel with the thickness down to 4.8 nm and the oxygen content up to 35%. View Supplemental Document (pdf) |
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5:15 PM |
AA-TuA-16 Influences of Annealing Conditions on Characteristics of Sn-doped Zinc Oxide Thin Film Transistors Fabricated by Atomic Layer Deposition
Tao Wang, Hong-Liang Lu, Jian-Guo Yang, Wen-Jun Liu, Shi-Jin Ding, David Wei Zhang (Fudan University, China) Transparent oxide semiconductors employing a tin-doped zinc oxide (TZO) thin film generated via atomic layer deposition (ALD) at low temperature (150°C) are investigated for their feasibility into high performance thin film transistor (TFT). The resistivity of the as-deposited uniform TZO film is as low as 1.9×10-2Ω cm. The carrier concentration is high up to 4.9×1019cm-3 and the optical transparency is greater than 80% in visible range. The TZO thin film transistors exhibit excellent electrical and optical properties. In addition, the insights into the dependency of the impurities within the channel layer upon thermal annealing of the oxide film are presented. Studies towards an optimized annealing temperature (300°C) result in a high device performance in enhancement mode with a field effect mobility (μFE) of 13.7cm2/Vs and a subthreshold swing (S.S.) of 0.15V/dec. The performance of the TZO TFTs relies on carriers and defects in SnZnO and near the back-channel surface of SnZnO as well as the quality of the gate dielectric/SnZnO interface. Compared with the pristine devices, the TFT performance turned out to be dependent on the annealing temperature because of growing grain size and decreasing interface defects. These findings on the influence of annealing conditions allow for a better understanding on the formation of the active semiconductor channel and serve towards the applicability of ALD based transparent oxide semiconductors in next generation electronics. View Supplemental Document (pdf) |