Inkjet printing is a leading additive manufacturing method to produce patterned metal thin films on flexible substrates. The most commonly-used inks consist of colloidal nanoparticle suspensions that employ organic molecules to stabilize the nanoparticles from agglomeration and precipitation. High temperature (>200°C) treatment is used after printing to remove the insulating organics and sinter the nanoparticles. The thermal step can limit printing on polymers such as PDMS, paper, and other temperature-sensitive substrates. Moreover the selection of metals is limited by those available in nanoparticle suspensions, with the most popular being Ag.

A significant amount of development has been achieved integrating TSVs with standard silicon (Si) substrates; however, there are unique challenges associated with integrating TSVs with MEMS substrates. Industry has achieved TSV integration through a dependence on substrate thinning, a TSV reveal approach. However, often these MEMS devices depend on the thickness of the substrate for controlling the radius of curvature of the substrate, such as throughout Sandia’s ultra-planar multilevel MEMS technology (SUMMiT^TM). TSV filling relies on tight control of the fluid kinetics during the electroplating process and the ability to balance the diffusion of Cu²⁺ and organic suppressor molecules throughout the depth of the via in order to realize a void-free fill of the TSV. In this work we have extended the filling model for 60 μm deep TSVs, developed by Tom Moffat and Dan Josell, up to 675 μm deep TSVs.

In addition to the thickness constraints for MEMS integration, often MEMS devices are realized through unique release processes and are dependent on high temperature anneals. The most common release process is a hydrofluoric acid (HF) based release to selectively remove supporting oxide films and preserve the Si features that make up the MEMS components. The necessity to release structure in selective etchants presents additional challenges for integrating TSVs with MEMS components. We have overcome this challenge through the integration of additional capping layers which are selectively removed after the MEMS release. In order to accommodate the need for high temperature anneals we have removed the use of metal in the MEMS device and instead used doped silicon. The Cu TSVs are then integrated with the device after all the high temperature anneals are complete, making direct electrical contact to the doped Si. In this work, we present our integration approach for mating Cu TSVs with doped Si MEMS contacts and our plating approach for superfilling 675 μm deep, 100 μm wide TSVs.

This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy or the United States Government.

Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. SAND2018-5012 A.

In this work we have developed a novel methanesulfonic acid (MSA) based electrolyte with a single suppressor additive for filling 100 μm diameter 675 μm deep through silicon vias (TSVs). Contrary to conventional three-additive systems we have achieved bottom up super filling of these large TSVs with a single suppressor additive. This bottom up super filling mechanism is dependent on a strict balance between applied potential and diffusion of both suppressor molecules and Cu²⁺ ions. The bottom up deposition was developed through die level plating experiments on sample sizes approximately 1 in². We control the solution replenishment by connecting the sample, both electrically and mechanically, to an aluminum rod and rotating the sample in solution. The rotation rate is directly correlated to the velocity of solution moving across the opening of the vias and therefore related to the solution replenishment inside the TSVs. At first a potentiostatic approach was used to supply a sufficient potential to break down the suppressor with a reference electrode in our plating cell. Mapping the current, during deposition allowed us to develop a galvanostatic plating process.

Experiments were performed to scale this plating process to be compatible with production level electroplating tools. The fluid dynamics and applied current are significantly different on production plating tools. The tools do not come equipped with reference electrodes and in some cases, they have multiple anodes for current partitioning to control the uniformity of the electric field. Further, the wafer rotates about the center of the wafer and baffles are integrated into the tool to control the uniformity of a fountain type fluid replenishment system. With the wafer rotated about its center, there is a large variance in the velocity of fluid at different radii along the wafer. In this work, we present a set of scaling experiments performed on die with incremental increases in sample size to clearly map the die level plating parameters to a full wafer plating tool and achieve uniform TSV filling across a 150 mm wafer.

This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy or the United States Government.

Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. SAND2018-5013 A.

Multi project-wafers (MPWs) allow multiple customers to share the cost of a manufacturing run from an advanced semiconductor foundry. This offers a cost-effective solution for low volume the fabrication or prototyping of application specific integrated circuits (ASICs). This practice is especially appealing for those in academia or government that often only require small quantities of devices for research or niche applications. With many products on a wafer, all the products must adhere to the same strict design rules. In practice this means that the final metallization is made using AlCu. This presents challenges for advanced packaging of MPW die as AlCu is not compatible with conventional flip chip solder because of oxidation of the AlCu metal. Further complicating the integration of MPW die is the fact that they are singulated prior to delivery, preventing the use of lithography, and thus ruling out the deposition and patterning of solder-compatible metals over the AlCu. This leaves the use of electroless plating schemes to prepare MPW die for 2.5D/3D die stacking.

We propose a batch process to facilitate MPW die processing through the electroless under bump metallization (UBM) process. This process includes passivation of the Si die sidewalls post dicing, MPW die mounting, batch Zn or Sn immersion followed by electroless Ni, electroless Pa, immersion Au (ENEPIG) or electroless Ni, immersion Au (ENIG) UBM deposition for reliable, UBM deposition. We have demonstrated 2.5D integration of batch processed, AlCu finished die that have UBM deposited using this process to an interposer using electroplated Cu pillars bumps and Au bumps.

Supported by the Laboratory Directed Research and Development program at Sandia National Laboratories, a multimission laboratory managed and operated by National Technology and Engineering Solutions of Sandia, LLC., a wholly owned subsidiary of Honeywell International, Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA-0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy or the United States Government.

Scanning probe microscopy has been one of the most important instrumental discoveries during the last quarter of the last century. In particular, atomic force microscopy (AFM) is a cross-disciplinary technique able to provide sample morphology down to the atomic scale. It offers invaluable tools to support the development of nano-sciences, information technologies, micro-nanotechnologies and nano-biology. For more than 20 years, boosting the scan rate of AFM has been an increasingly important challenge of the community. However still today, performing routine and user-friendly AFM experiments at video rate remains unreachable in most cases. The conventional AFM probe based on a micro-sized vibrating cantilever is the major obstacle in terms of bandwidth and resonance frequency.

Following a brief description of the context of the work, the talk will first describe the development of AFM probes based on MEMS devices that make use of ring-shaped microresonators vibrating above 10 MHz. A focus will be dedicated to the electrical detection scheme. Based on capacitive transduction and microwave reflectometry, it achieves a displacement resolution of 10^-15m/√Hz, allowing the measurement of the thermomechanical vibration of the MEMS AFM probes in air. Imaging capability obtained on DNA origamis samples at a frame rate greater than 1 image/s will be shown as well as investigation of block copolymer surfaces to elucidate the tip-surface interaction when vibration amplitudes are lower than 100 pm.

In the following, our recent research direction at the convergence of the fields of micro/nanosystems and VLSI optomechanics on silicon chips will be presented. Optomechanical resonators allow indeed overcoming the resolution limitation imposed by usual electromechanical transduction schemes. Here, we will introduce fully optically driven and sensed optomechanical AFM probes which resonance frequency is above 100 MHz and Brownian motion below 10^-16m/√Hz, paving the way for high-Speed AFM operation with exquisite resolutions at sub-angstrom vibration amplitudes.

This work was supported by the Laboratory Directed Research and Development program at Sandia National Laboratories. Sandia National Laboratories is a multi-mission laboratory managed and operated by National Technology and Engineering Solutions of Sandia, LLC., a wholly owned subsidiary of Honeywell International, Inc., for the U.S. Department of Energy's National Nuclear Security Administration under contract DE-NA-0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy or the United States Government.

Microelectromechanical switches (MEMS) have a wide variety of applications, such as in radio frequency switching, sensing, etc. thanks to their high non-linearity, sensitivity and integrability. Unfortunately, traditional MEMS typically need tens of volts for actuation, which prevents their use in applications that require low voltage CMOS circuitry. The typical size for MEMS switches is ~100µm, but recent work [1] has shown a scalable two-terminal nanoelectromechanical (NEMS) switch with low actuation voltage (<1V). The pipe clip structure is based on side edge actuation and is prone to reliability issues due to stiction since the electrode width is quite large (~300nm). We propose a structure based on a protrusion (dimple) small contact area and tunable dimensions during the fabrication process.

This paper presents a nanoelectromechanical switch with <3V actuation voltage. The proposed design is based on a fixed bottom electrode line (Pt) and two pillars that support a metallic nanowire (~100nm wide) beam line. Since stiction is a significant issue for this device, the design includes protrusions (dimples) positioned in the center of the beam line with the scope of creating a small contact point with the bottom electrode. The structure is electrostatically actuated through a voltage applied on the beam while the fixed electrode is grounded. A small air gap between the beam and the bottom electrode line is crucial for reducing the actuation voltage, but can cause problems during the release. Finite element simulations in Comsol Multiphysics 5.2 were used to investigate the constraint space needed for the design of a NEMS relay with such a low actuation voltage, as needed for compatibility with a typical 3.3V CMOS technology. These simulations informed the geometries explored in the fabrication of a low power NEMS device with a double-clamped metallic beam. The surface micromachining process was developed to have a low-thermal budget (< 200 ^oC) and be multilayer CMOS compatible. The fabrication flow was based on SiO₂ as an inorganic sacrificial layer for obtaining a clean release. A mix of photolithography and e-beam lithography, lift-off and dry etching steps utilized are described, and challenges during the electrical characterization are discussed. Future design iterations focused on different beam designs are also presented.

1. J.O. Lee, Y.H. Song, M.W. Kim, M.H. Kang, J.S. Oh, H.H Yang, and J.B. Yoon, “A sub-1-volt nanoelectromechanical switching device”, Nature nanotechnology, 8(1), 36-40, 2013.