AVS2017 Session 2D+EM+MN+NS-WeA: 2D Device Physics and Applications

There has been significant research interest in graphene for electronics applications, due to its good electrical conductivity, high optical transparency, mechanical flexibility, and two-dimensional structure. However, the potential of graphene as a channel material replacing silicon is limited due to the absence of a bandgap. On the other hand, graphene is an excellent candidate as a transparent, conductive, and flexible electrode for electronic and optoelectronic devices.

Unlike conventional metals, whose Fermi level is typically pinned at the surface, the Fermi level and hence workfunction of graphene can be tailored by electrostatic gating, chemical doping, or surface engineering. As a result, graphene is also a promising candidate as the gate electrode in metal-oxide-semiconductor (MOS) devices, particularly when transparency or workfunction tunability is a requirement.

In real graphene sheets, charged impurities cause electron-hole puddles and random local electrostatic potential fluctuations (statistically described by a Gaussian distribution), which leads to a modified density of states (DOS). In this work, using this modified DOS, we numerically compute the quantum capacitance of graphene as a function of the graphene electrostatic potential at different temperatures and strengths of the potential energy fluctuations. We compare the exact results to various approximations made in the literature when fitting experimental data. We find that the largest discrepancy between the exact results and the approximations occurs near the Dirac point.

In capacitance-voltage (C-V) characterization of graphene-gate MOS devices, what is measured is not the quantum capacitance versus the graphene potential, but the total gate capacitance versus the gate voltage. We numerically compute the gate voltage as a function of the graphene potential and the resulting C-V characteristics at different temperatures, strengths of the potential energy fluctuations, and equivalent oxide thicknesses. We also consider the effect of series and parallel parasitic impedance to the overall shape of the C-V curves. Furthermore, we numerically compute the full C-V characteristics at different values of the equivalent oxide thickness, silicon doping density, and Dirac voltage of graphene. Finally, we fit our recent experimental C-V data with these theoretical calculations to extract the strength of the potential energy fluctuations and the parasitic impedances.

Two-dimensional transition metal dichalcogenide (TMD) materials are a subject of intense research for use as future, low-power semiconductors. The successful fabrication of TMD based transistors requires a scalable dielectric deposition process. Atomic layer deposition (ALD) is commonly used to grow high-k gate dielectrics, though deposition of thin, pin-hole free dielectrics is challenging due to the chemically inert basal plane of most TMD materials. To overcome this limitation, surface functionalization processes have been developed to improve ALD nucleation.

In order to elucidate the effects of surface functionalization and subsequent ALD on the electrical characteristics of TMD transistors we use an in-situ electrical characterization system to measure the electrical properties of TMD transistors at various steps during the deposition process. MoS₂ backgated transistors are loaded into an ultra-high vacuum (UHV) cluster tool where samples can be transferred under UHV conditions between various chambers. The cluster tool is equipped with a thermal ALD chamber, a hollow cathode plasma enhanced ALD chamber, a plasma enhanced chemical vapor deposition chamber, and a UHV electrical probe station. Results for ozone, nitrogen radical, and nitrogen plasma functionalization will be presented. The effect of surface dipoles, precursor adsorption and coverage, and nucleation during the ALD process will be discussed as they relate to the electrical characteristics of the device.

2D materials such as TMDs(Transition Metal Dichalcogenides), Graphene and BN have attracted great attention as new channel materials for future devices due to their excellent electronic and optical properties. For such devices, sub nanometer thick and defect free gate oxide is an essential part. However, due to the inert surface of the materials, high K oxide such as Al₂O₃ and HfO₂ selectively nucleates on defect sites or step edges. Therefore, for successful integration, preparation of uniform and insulating gate oxides are a matter of importance. In this study, Al₂O₃ was deposited on 2D materials surface by low temperature ALD using trimethylaluminum(TMA) and H₂O without any seeding layer or surface treatments. Using short purge time between two precursor pulses at 50C, a CVD component was induced to provide uniform nucleation sites on the surface. The CVD component generates subnanometer AlOx particles[s1] [file:///C:/Users/kwak1/Downloads/2017_AVS_abstract_bilayer_oxide.docx#_msocom_1] on the surface which provide uniform nucleation sites. In order to obtain lower EOT layer, 10 cycles of Al₂O₃ ALD was deposited at 50C as a seeding layer and 40 cycles of HfO₂ ALD was deposited with Tetrakis(dimethylamido )hafnium (TDMAH) and H₂O at 250C. The same oxide was deposited on a SiGe substrate to compare the oxide characteristics. After ALD, MOSCAPs were fabricated to measure electrical properties. AFM measurement revealed that uniform and defect free oxide layers were nucleated on the surfaces. Capacitance-voltage measurement showed that Cox of the bilayer oxide was 2.5 uF/cm2 and the gate leakage current of the oxide was about 10^-5 A/cm² which was comparable to the oxide on a SiGe substrate. Identical bilayer oxide layer was deposited on a dual gated WSe₂ FETs . Top gate oxide leakage of the device was about 10^-6 A/ cm2. In order to assess the quality of the oxide, a benchmarking study of current density versus EOT of 2D semiconductor FET devices and Si based devises was investigated. The study showed that record-low EOT (1.2 nm) and leakage current (10^-8 μA/ μm²) comparable to the best Si devices with La₂O₃ gate oxide by Iwai et al was achieved by the WSe2 FET. This technique was also applied to initiate nucleation[s2] [file:///C:/Users/kwak1/Downloads/2017_AVS_abstract_bilayer_oxide.docx#_msocom_2] on inert metal surfaces which are important for logic memory devices including selectors. Using the bilayer oxide, insulating oxide was prepared on Au electrodes of a MOSFET device. The leakage current of the oxide was as low as 10^-7 A/ cm².

2D transition metal dichalcogenide (TMDC) semiconductors, including MoS₂, WS₂, and more recently ternary compounds, exhibit exceptional structural, electrical and optical properties that make these materials of great interest for nano-optoelectronic devices. For example, unlike graphene, TMDCs have a bandgap, which has the remarkable characteristic of becoming direct when the material is in monolayer form, while it is indirect when the material is composed of multiple layers.

Here, we report the synthesis of monolayer MoS₂, WS₂, ternary Mo_xW_1-xS₂ ternary compounds and MoS₂/WS₂-based heterostructures, by chemical vapor deposition (CVD) process at temperatures in the range 950-1000 C, without the use of seeds to avoid contamination. The material was extensively characterized using micro-Raman spectroscopy, micro-photoluminescence, and electron microscopy.

Using such large area CVD grown materials, large-area MoS₂ photoconductive detector devices were fabricated using conventional photolithography to realize of interdigitated metal fingers. The electrical and spectral photoresponse from monolayer and multilayer MoS₂ have been compared, in terms of responsivity and specific detectivity. The monolayer devices exhibited high photoconductive gain and detectivity near 10¹² Jones, which was also found to be higher than in the case of multilayer MoS₂ devices. The rise and decay time of passivated monolayer devices was investigated and shown to be much faster than the unpassivated devices.

Carbon nanomembranes (CNMs) are two-dimensional materials made by cross-linking self-assembled monolayers (SAMs) of aromatic molecules via low energy electron irradiation. Previous study of molecular junction incorporating SAMs and CNMs of oligophenyl thiols has been carried out by using conical eutectic Gallium-Indium (EGaIn) top-electrodes¹ and conductive probe atomic force microscopy (CP-AFM). Here we investigate the dielectric properties of pristine SAMs and CNMs with an EGaIn top electrode by impedance spectroscopy. Analysis and comparison of the tunneling resistance and capacitance density of pristine and cross-linked SAMs revealed a thickness dependent capacitance associated with the monolayer as well as a thickness independent capacitance. We adopted an equivalent circuit to take into account the contribution of the interfacial capacitance as well as the oxide layer of the EGaIn top electrode. The obtained tunneling decay constant remains unaffected after electron irradiation, which exhibits a value of about 0.5 Å^-1 for both systems. A determination of dielectric constants of SAMs and CNMs from the impedance spectra will also be analyzed and discussed. Furthermore we characterize stacks of CNMs sandwiched with graphene and other 2D materials.

¹ P. Penner, X. Zhang, E. Marschewski, et. al, J Phys Chem C 2014, 118, 21687.