AVS2014 Session 2D-ThP: 2D Materials Poster Session

Characterization of graphene forms an important part of graphene research and involves measurements based on various microscopic and spectroscopic techniques. Characterization involves determination of the number of layers and the purity of sample in terms of absence or presence of defects or doping species.

A quantitative estimation of the layer thicknesses can be obtained using attenuated secondary electrons emitted from the substrate. Transmission electron microscopy (TEM) can be directly used to observe the number of layers on viewing the edges of the sample, each layers corresponding to a dark line. The information on the defectness of the graphene layer or presence of dopant species can be provided by surface sensitive technique such as XPS and SIMS (Secondary Ion Mass Spectrometry).

The extreme sensitivity of SIMS to any doping constituents in the surficial layer could provide the important information, difficult to obtain by other technique. Application of SIMS to graphene is not yet established. This work is having the goal to advance in finding an approach for graphene layers characterization.

SIMS is a destructive technique based on physical sputtering and consecutive ionization of sputtered atomic or molecular particles. All problems inherent to sputtering itself, such as recoil mixing and ion enhanced diffusion reduce the depth resolution necessary for monoatomic layers characterization. In order to avoid such effect, an Extremely Low Impact Energy (EXLIE) ion beam approach is employed in our experiments. Sputtering with different ionic species and under different angles is performed, targeting the best possible depth resolution in graphene layers.

These EXLIE SIMS measurements are among the first SIMS results obtained on such structures. SIMS as many of the characterization processes needs subsequent tests to determine the validity of the results, using different SG, FG and SLG structures. The SIMS quantification aspects will be also discussed.

Germanium nanoparticles (Ge-nps) have potential applications for electronic flash memories and light emitters in visible and near infrared wavelengths, with the main advantage of being compatible with actual device technology. It is know that, in floating gate devices, semiconductors nanoparticles are the charge-storage nodes placed in the gate oxide between the gate and de channel. Thus, as a result of the smaller bandgap, superior carries mobilities, and higher excitonic Borh radius compared to Silicon (Si), quantum confinement effects are much more obvious in Ge-nps, making this compound more ideal for memory devices. On the other hand, efficient light emission from Ge-nps in SiO₂ matrix has been already demonstrated being that this can be tuned by changing the size of the nanoparticle and their existence is attributed to the presence of oxide defects, nanoparticles interface, quantum effects, Ge oxygen deficient centers, etc. So, in this context, the present wok proposes the study of the influence that the improvement of the Ge-nps quality grown in SiO₂ by LPCVD under different time of deposition, have on their photoluminescence and memory characteristics. For that, measurements as Raman Spectroscopy (RS), Atomic Force Microscopy (AFM) and photoluminescence spectroscopy (PL) were carried out. All samples were made on p-type Si (100) wafer covered by a 8 nm-SiO₂-thermal-layer, using a vertical CVD reactor PMC 200 Phoenix Materials Corporation. The synthesis method was realized following a two-steps process: a first step, where took place the functionalization of SiO₂ surface by the deposition of Si nuclei from the SiH₄ pyrolysis, and a second step, where the selective growth of Ge nps over Si nuclei happens from GeH₄ pyrolysis. Fig 1 shows the Normalized PL spectra for different Ge-nps size where a shift in the PL peak position towards longer wavelengths is observed with the increase of nanoparticle-size and, a raise in the intensity of the peak can be note with the enhance of the density of nanoparticle. For the memory characterization, circular MOS capacitors with 200 μm of diameter were fabricated containing these Ge-nps. Fig 2 shows the schematic of the MOS device (a) and the C-V curve comparison between a standard MOS capacitor and one containing the Ge NPs (b). According to this Fig., can be assumed that the major contribution to the memory property of the device comes from the nanoparticles in the gate dielectric since, for the capacitor without nanoparticles hardly hysteresis is observed.

Enhanced electrical conductivity of transparent carbon nanotube sheet by acid treatment

Jinhong Kim, Daewoong Jung, Maeum Han and Gil S. Lee^*

Department of Electrical engineering, University of Texas at Dallas, Richardson, Texas, USA

Fax: +1-(972)-883-6839 E-mail address: gslee@utdallas.edu

Considerable efforts were dedicated to fabricate flexible transparent conductive films (TCFs) with high transmittance and low resistance for utilizing in various applications. To date, the most commonly used material for TCFs is indium tin oxide (ITO) due to its high transparency and low electrical resistance. However, there are several disadvantages with using ITO films in future applications, such as the brittleness and problems with polymer substrates. Recently, researches focused on developments in flexible TCFs, either through optimized structural configuration or exploring new materials to replace ITO films.

Carbon nanotubes (CNTs) have received increasing attentions as ITO replacement due to their excellent mechanical, electrical, thermal properties. Our previous work produced transparent, conductive CNT sheets by using a simple spinning method [1-2]. These CNT sheets had sheet resistances of 0.75-1 kΩ/sq and transmittances of ~85-90 %. However, there was a trade-off effect between sheet resistance and transmittance of TCFs during transferring process of CNTs. An increasing number of CNT layers in the TCFs can decrease the sheet resistance as well as the transmittance, simultaneously. Therefore, key challenge is how to realize the highly conductive CNT sheet without a degrading of transmittance.

Simple acid treatment was conducted to improve the electrical conductivity of the CNT sheets. The transferring CNT sheets on glass substrates were immersed in 60 % nitric acid for 1 hour. After the acid treatment, highly conductive CNT sheets were obtained with slightly increased transmittance. The acid treatment leads further inter-connection between the individual CNTs to form continuous electrical pathway, result in high conductivity of the CNT sheet. These results lead us to believe that the CNT sheets with low sheet resistance (450 Ω/sq) and high optical transmittance (90%) can be potential candidate for flexible TCF applications.

Reference

1. Jung et al, Sens Actuators A199 (2013), 176.

This presentation will address the revolution that is occurring in 2D materials such as Graphene, MoS₂, WeSe₂, etc., and the variety of measurement modalities that are needed to fully understand these materials at cryogenic temperatures.

It is a challenge to study such materials at temperatures down to 10^oK when one considers the wide variety of physical phenomena that have to be applied to get a full picture of the functionality of the material under study. This involves questions of structure, nanometric photoconductivity, electrical properties, thermal properties, near-field optical in the apertured and scattering modes, Kelvin probe, and of course Raman. All of these phenomena are common not only to 2D materials but also to carbon nanotubes.

Today’s scientific challenges demand a system where one can image these phenomena and correlate such images with the nanometric structure of the material under study. This requires a multiprobe scanned probe microscopy system working at such extreme temperatures, which allows for multiple SPM on-line while maintaining complete optical accessibility. More specifically, the probes which can investigate near-field photoconductivity and Kelvin probe have to be capable of being on-line at the same time and also come into contact with one another to obtain overlapping images of nanometric spaces while still allowing for reflection Raman. This is necessary as many of these systems are incorporated into opaque devices. Such a system will be presented in this presentation with results on graphene.

PTCDA devices grown on Si substrate exhibit a rectifying behavior because Schottky can be formed at interface between PTCDA layer and Si substrate. The dielectric constants around ~1.6 - 2.2 were extracted from capacitance at built-in potential. These results are consistent with previous papers about organic-inorganic Schottky diode.[2] However, as the PTCDA film thickness is scaled down from 20 to 5 nm, the reverse currents increase up to six orders of magnitude possibly because of the tunneling current. In order to explore the tunneling behavior of PTCDA layer on the graphene, the current behaviors of PTCDA layer on HOPG has been investigated. Similar to the current behavior of thin PTCDA layer on Si substrate, PTCDA device on HOPG exhibit tunneling behavior; the current increase linearly with the applied bias in low bias region, whereas it changes exponentially as a function of applied bias in high bias region. The tunneling current of PTCDA layer shows thickness dependence. These behaviors can be modeled by direct tunneling equation. [3] Capacitances around ~9 and ~16 pF in 3 and 1 nm PTCDA layer on HOPG, respectively, were identified using a time domain reflectometry (TDR) measurement, which are coincide with the value of PTCDA on Si substrate. In addition, there is a weak temperature dependence in current of thin PTCDA device.

In summary, non-2D crystalline low-k dielectric has been developed for the tunnel barrier of graphene based device. The thickness of PTCDA film was successfully scaled down to a few layers. It has also demonstrated that the devices fabricated with thin PTCDA films on HOPG exhibit feasibility of direct tunneling behaviors.

[1] S. K. Banerjee et al., Electron Device Lett. 30, 158 (2009).

[2] S. R. Forrest et al., J. Appl. Phys. 56, 543 (1984).

[3] W. Wang et al., Rep. Prog. Phys. 68, 523 (2005).

The interaction of slow highly charged ions (HCI) with solid surfaces has been excessively investigated within the recent past. Numerous systematic experiments on the nano structure creation by HCI impact have been carried out and revealed in a variety of different models describing phenomena as the creation of nano hillocks, mono atomic deep pits and etch pits on different kind of (bulk) materials [1-5].

Recently, we have investigated the interaction of slow HCI with one nanometer thin carbon nano sheets. We could show that HCIs can efficiently induce the creation of nm-sized pores in these membranes [6]. However, the extremely small thickness of this kind of target offered us a second opportunity - the observation of the projectile right after the interaction process in terms of its energy loss and charge exchange.

The results of those measurements show an unexpected two-fold ion charge sate distribution after passing the membrane comprising (a) ions with very high charge states (close to the initial one) that almost lost no kinetic energy as well as (b) very low charged ions that lost a significant amount of kinetic energy. The balance of both contributions was found to depend strongly on the initial ion charge state. From these findings we draw a microscopic picture of the interaction process that is presented in the present contribution.

References

[1] A.S. El-Said, R. Heller, W. Meissl, R. Ritter, S. Facsko et al., Phys. Rev. Lett. (2008) 100, 237601

[2] R. Heller, S. Facsko, R. A. Wilhelm and W. Möller, Phys. Rev. Lett.(2008) 101, 096102

[3] A.S. El-Said, R. Heller, F. Aumayr and S. Facsko, Phys. Rev. B(2010) 82, 033403

[4] A.S. El-Said, R. A. Wilhelm, R. Heller, S. Facsko et al., Phys. Rev. Lett.(2012) 109, 117602

[5] F. Aumayr et al., J. Phys.:Cond. Mat.(2011) 23, 393001

[6] R. Ritter, R. A. Wilhelm, M. Stöger-Pollach, R. Heller et al., Appl. Phys. Lett.(2013) 102, 063112

We report the first dry-transferred pristine molybdenum disulfide (MoS₂) field-effect transistors (FETs) fabricated without any post-transfer lithographical and chemical processes, by using a facile, completely-dry-transfer technique with high throughput and high alignment precision. We show that the device performance can be greatly boosted by thermal annealing.

MoS₂ FETs have shown significant potential for enabling 2D electronic devices [1], by demonstrating increasingly competitive performance including high mobility, contact quality, and excellent On/Off ratios. All the MoS₂ FETs reported to date, however, are fabricated using electron-beam- or photo-lithography on top of MoS₂ flakes, and/or polymer-assisted transfer of MoS₂ sheets followed by dissolving the polymer [2], both of which involve multiple wet processing steps. Such processes may contaminate or even degrade the MoS₂ surface, and adversely affect device performance[3].

Here, we demonstrate multilayer MoS₂ FETs fabricated by using a completely-dry transfer method, which not only obviates the undesirable wet chemistry steps, but also has high device yield and more scalable device geometry. Using the technique, we fabricate the electrodes at wafer scale, aligning each flake to the electrodes during the transfer, which significantly improves the efficiency and yield, achieving nearly 100% success rate in obtaining pristine MoS₂ FETs. This dry-transfer process is readily applicable to substrates with much thinner high-k dielectric layers to attain low-threshold-voltage, low-power operations. Also, the performance of as-transferred devices can be further improved through vacuum annealing treatments. While experiments suggest that annealing may lead to dissolving of graphene into metal and thus improve contact [4], annealing effect on MoS₂ devices remains to be systematically explored. We find that the devices’ performance typically exhibit noticeable improvement after initial annealing, and further enhancement can often be achieved via additional annealing. With annealing treatments at increasing temperatures, reliable reduction in device resistance is observed, together with consistent increase in mobility up to µ=76cm²/(V∙s), improvement in On/Off ratio exceeding 10⁷, and enhancement in transconductance. Furthermore, while sometimes annealing can even convert non-Ohmic contacts into Ohmic, occasionally such conversion may not be completed, but still clear improvement can be observed.

[1] B. Radisavljevic, et al., Nat. Nanotechnol. 6, 147 (2011).

[2] D. Dumcenco, et al., arXiv:1405.0129 (2014).

[3] Z. Cheng, et al., Nano Lett. 11, 767 (2011).

[4] W. S. Leong, et al., Nano Lett. 14, 3840 (2014).