The ability to grow and transfer large area single-layer graphene is critical from both fundamental and applied points of view. The transfer of large area samples will facilitate fundamental studies of graphene’s unique properties. It can also allow for the fabrication of three-dimentional structures, electrically insulated graphene bilayers, graphene on previously unexplored substrates and “curved” graphene with non-trivial geometry. Currently, single layer graphene grown via CVD on metal foils is transferred to other substrates via chemical etching of the foil. The transfer process is time consuming, generates chemical waste, and destroys the foils.

We have developed method for direct dry transfer of graphene grown on Cu foils to polymers. The method relies on the differential adhesion between graphene, the metal foil, and the receiving polymer. A successful print results when the adhesion of graphene to the polymer surface is stronger than its adhesion to the metal foil. Plasma treatment of polymers allowed for the attachment of perfluorophenylazide (PFPA) linker molecule. The transfer printing was performed by placing the PFPA treated polymer surface in contact with graphene covered Cu foil and applying heat and pressure. Then, the polymer substrate with transferred graphene was separated from the Cu foil. In this talk, details of the printing process along with graphene film characterization will be discussed.

This work was supported by the Office of Naval Research. M. Baraket appreciates the NRL/NRC postdoctoral research fellowship.

Graphene, being a two dimensional material, is one of the most promising alternative channel materials for post-Si generation [1-3]. However, being just one atom thick and having an inert surface, it poses a huge challenge to develop a top-gate dielectric process for graphene-based devices. Several techniques are currently being explored for depositing dielectrics including physical-vapor deposition (PVD), chemical-vapor deposition (CVD) and atomic layer deposition (ALD) after chemical ‘functionalization’ of graphene (using NO₂ or O₃) or after depositing nucleation layers (such as Al, PTCA, PVA) on graphene [3].

Here, we will present a novel technique developed by our group for depositing ALD high-k dielectrics such as Al₂O₃ on graphene through ozone functionalization [4]. Physisorption of ozone has been claimed to be the plausible mechanism for functionalizing the graphene surface [5]. Based on Langmuir adsorption equation, the amount of ozone adsorbed on graphene can be increased by increasing the partial pressure of ozone. By utilizing this, we have been able to precisely control the dielectric thicknesses and successfully scale dielectrics on graphene down to a thickness of ~3 nm. We employed both AFM on HOPG/graphene and in-situ electrical characterization of graphene-FETs in order to understand the adhesion mechanisms of ozone with graphene, enabling the deposition of ALD dielectrics. For in-situ electrical characterization, we used package-level devices with back-gated graphene devices to detect molecules adsorbed on graphene surface. The observed charge scattering mechanisms and effect on mobility due to the interaction of ozone with graphene as a function of temperature and amount of ozone will be presented. In-situ studies regarding the role of TMA (Tri-methyl Aluminum) will also be discussed based on experiments in actual ALD chambers.

Acknowledgement

NRI-SWAN (Theme # 1464.012) and Korea-US International R/D program by MKE

References

[1] P. Avouris, Nano Lett. 10 (11), pp. 4285-4294 (2010)

[2] V. V. Cheianov, et al., Science 315 (5816), pp. 1252-1255 (2007)

[3] S. K. Banerjee, et al., Pro. of IEEE, 98 (10), pp. 2032-2046 (2010))

[4] B. Lee, et al., Appl. Phys. Lett., 97 (4), 043107 (2010)

[5] G. Lee, et al., Jour. Phys. Chem. C, 113 (32), pp. 14225-14229 (2009)

1. Robinson, et.al. ACSNano 4(5) 2667 (2010)

2. Farmer, et. al. Nano Letters 9(12) 4474 (2009)

3. Lee, et.al. ECS Transactions 19(5) 225 (2009)

Graphene grown by chemical vapor deposition (CVD) provides a promising pathway for large area fabrication of graphene field effect transistor (FET). However, the performance of CVD graphene FETs reported to date is poorer than FETs fabricated using exfoliated graphene. CVD graphene FETs often exhibit strong hysteresis accompanied with low mobility, large positive Dirac point (V_Dirac) and large intrinsic carrier concentration. CVD graphene is exposed to a number of aqueous solutions and deionized water when it is transferred to a device substrate. We find that the large V_Dirac shift and strong hysteresis observed in CVD graphene FET are largely due to water trapped in the graphene/substrate interface during the transfer process.

In this study, CVD graphene grown on copper is transferred to SiO₂ substrates with the following three interfacial conditions: i) normal hydrophilic SiO₂, ii) SiO₂ with 20nm of Al₂O₃, and iii) a hydrophobic surface prepared by coating hexamethyldisilazane (HMDS). Device performance, including mobility, V_Dirac and intrinsic carrier concentration are compared in ambient as well as in vacuum. Gate hysteresis is analyzed by measurement of time-resolved channel resistance at various back-gate bias voltages. We find that the gate hysteresis is partially reduced by transferring the graphene onto a substrate coated with HMDS. Vacuum pump down and low temperature (80 °C) annealing can remove the remaining gate hysteresis and V_Dirac shift. The resulting hole mobility is 5,420cm²/Vs, which is high compared to most of the CVD graphene mobility values reported in the literature.

As a control experiment, the CVD graphene FET fabricated on untreated SiO₂ shows a smaller mobility, a larger V_Dirac and a stronger hysteresis compared to the HMDS coated sample. Under vacuum the hysteresis is reduced but remains significant. We believe the remaining hysteresis is due to adsorbates trapped at the substrate/graphene interface. A graphene FET prepared on a substrate with an Al₂O₃ interface shows less hysteresis than the sample fabricated on an untreated SiO₂ surface but more than that of the HMDS coated surface. In order to study the influence of water trapped between the graphene and the substrate, water is intentionally replaced by isopropanol at the end of the transfer process before drying. In samples prepared using this method, hysteresis and V_Dirac point shift are both reduced. These results indicate that efforts to prevent trapping of water molecules at the graphene/substrate interface during the transfer process will improve the performance of CVD graphene FETs.

This work was supported by the NRI SWAN center, ONR, NSF and Sandia's LDRD program.

Large area turbostratic graphene was grown on the (0001) plane of sapphire by thermal decomposition of acetylene. Sapphire is an attractive substrate since it has a symmetry match and close coincidence lattice match to graphene. It is a good insulator, appropriate for electronics applications, and large single crystal wafers are readily available. We have found that only after overcoming nucleation barriers, high quality graphene can be grown directly on sapphire without transfer. The sapphire was first heated to about 1400 C to obtain a reconstructed sqrt 31x31 R9 surface structure. The reconstruction was monitored in real time via reflection high energy electron diffraction, which was possible due to the low Debye-Waller factor. After obtaining a clean reconstructed surface, the sample was cooled to near room temperature and exposed to 10 Torr of acetylene. The sample was then heated to 1400 C in the presence of acetylene, in order to nucleate growth. At these pressures, sufficient acetylene coverage for growth was maintained during the ramp to high temperatures. Continued exposure to acetylene at 1400 C did not result in further growth. We speculate that at high temperature there is not sufficient residence time for incorporation, thus lower temperature is needed for further growth. Controlling pressure and temperature during a cool down phase becomes the fine control for film thickness. For example, 10 nm thick graphene samples were obtained by cooling in 1 – 7 E-7 Torr of acetylene. Transmission electron diffraction showed very sharp, nearly continuous rings, indicating large domains and no preferential azimuthal rotation between planes. X-ray diffraction showed an increased layer separation of 0.345 nm compared to graphite. Electron energy loss spectroscopy showed bulk-like plasmons or interband transitions, indicative of multilayer graphene. Raman spectra showed 2D/G peak intensity ratios of 0.5 to 1, comparable to literature values for turbostratic graphene. The spectra also exhibit the expected broader highly symmetric 2D peak. Thicker films could be easily lifted from the substrate. Films greater than 100 nm thick exhibited macroscopic ripples while 10 nm thick films were flat. Hydrogen was explored as a means to control growth but was found to rapidly etch graphene and to passivate the room temperature reconstructed sapphire surface. The growth was modeled with a simple rate equation analysis. These results offer a route to large area graphene grown directly on single crystal sapphire wafers.

Partially supported by the University of Minnesota IREE and by the National Physical Laboratory, India