AVS2010 Session LB-WeA: Late Breaking Session Featuring Talks on Energy, Graphene and Atom-Probe Tomography

Improvements in energy efficiency of electronic devices are receiving increased attention. The increasing power consumption of complementary-metal-oxide-semiconductor (CMOS) transistors leads to large power dissipation and high chip-temperatures and has implications for device performance and battery life. Scaling of contact area, source/drain junction depth, and contact silicide thickness leads to an increase in the parasitic resistance in the circuit. The fundamental contact-scaling problem arises from the lateral scaling of the contact area in two dimensions. Therefore, the contact resistivity associated with the interface between the source/drain contact and doped contact silicon ultimately becomes the dominant component of the overall source/drain parasitic resistance. There is a need for low barrier height contacts, which can lead to low parasitic resistance and consequently to lower power consumption, heat dissipation and longer battery life times.

Nickel monosilicide has been the material of choice for source/drain contacts to CMOS transistors in recent technology generations. Alloying with nominal amounts of transition metals, such as Pt or Pd, has been employed to overcome the integration challenges faced during processing. These include agglomeration of this low resistivity NiSi phase; and phase transformation to the higher resistivity NiSi₂ phase during fabrication. Local-electrode atom-probe (LEAP) tomography is used in this study to map three-dimensional (3D) distributions of Pt or Pd in Ni monosilicide thin films to obtain insights into the role played by these transition metal elements in phase stabilization. Solid-solutions of Ni_0.95M_0.05 (M = Pd or Pt) thin films on Si (100) substrates are subjected to rapid thermal annealing to form the monosilicide phase. Focused-ion-beam milling is employed to implement the lift-out technique to prepare LEAP tomography samples.

Pt and Pd segregate at the silicide/silicon heterophase interface for Ni_0.95Pt_0.05 and Ni_0.95Pd_0.05 thin films. A measured decrease of the interfacial Gibbs free energy due to segregation at the silicide/silicon interface is most likely responsible for the stabilization of the monosilicide phase at elevated temperatures. Quantitative evidence for short-circuit diffusion of Pt via grain boundaries in the NiSi phase is observed in 3D direct space, providing valuable insights into the kinetics of the reactive diffusion process. The high spatial resolution and the unique 3D nature of the measurements yields accurate and precise measurements of both the lattice and grain boundary diffusivities of Pt. This discovery underscores the importance of interfacial phenomena in the stabilization of this low-resistivity phase and may help explain modification of NiSi texture, grain size, and morphology caused by Pt. The silicide surface work function shifts to the Si valence band edge with Pt incorporation. Additionally, the silicide/Si heterophase interface was reconstructed in three-dimensions on an atomic scale and its chemical roughness evaluated.

This research is supported by the Semiconductor Research Corporation/Global Research Collaboration. The specimens employed were obtained from IBM T. J. Watson Research Center. Acknowledgements are due to IBM Research for an IBM PhD Fellowship for the academic year 2009-2010.

Epitaxial graphene (EG) has exciting material properties that promise advancements in electronics, specifically in the fabrication of RF field-effect transistors. When EG is grown on the 4H- or 6H-SiC (0001), step-bunching occurs [1] with vertical morphology of 5 – 10 nm which poses a challenge to device development. Additionally, surface steps in graphene show a conductance difference between paths parallel and perpendicular to the step direction [2]. Hence to fabricate device structures, it is highly desirable to place devices on the relatively narrow (~2-4µm) terraces. In this work, we use large area, step-free 4H-SiC mesas (SFMs) to form EG and the results are found to mitigate the terrace (step bunching) related challenges present in traditional on-axis 4H-SiC (0001) wafer growth

Hexagonal and square SFMs with side dimensions ranging from 40 to 200 µm were formed by homoepitaxial growth of (0001) 4H-SiC layers [3] using a kinetically-controlled lateral step flow growth process at 1580⁰C, resulting in atomically flat mesas devoid of surface defects. This was followed by EG growth in a 100 mbar Ar ambient at 1620°C for 1.5 or 2.5 hours. Nomarski microscopy was used in the identification of mesas having specular surfaces, or single stepped and defective surfaces. Micro-Raman spectroscopy and surface mapping using a laser excitation of 514.5 nm was employed to confirm the presence, thickness and strain variation of EG across the mesas. Veeco D3100 AFM (tapping mode) and LEO Supra 55 Scanning Electron Microscope was used to extract surface morphology variations across mesas.

Preliminary results show that 1.5 and 2.5 hours of EG growth were more than sufficient for complete uniform monolayer and bilayer graphene coverage on the mesas, respectively. The surface of the EG on SFMs had atomic steps ≤ 0.6 nm, a reduction in step-height by a factor of 30 from typically grown step-bunched graphene on 4H-SiC (0001) substrates. Raman 2D peak position maps for monolayer and bilayer regions show relatively low strain (~2700cm^-1) coverage with the former approaching values close to exfoliated graphene (~2696cm^-1). Thus, the use of large area SFMs for EG has resulted in novel characteristics that holds great promise towards controlling layer thickness homogeneity without step bunching and having minimal strain.

References

[1] Tedesco, J. L.; et al ECS Trans. 2009, 19, 137-150.

[2] Yakes, M. Y.; et al Nano lett. 2010, 10, 1559-1562.

[3] Neudeck, P. G.; et al MRS symp. Proc. 911, 2006

Realizing graphene-based technologies requires both large-area graphene production and integration with scalable high-k gate dielectrics. Thermal atomic layer deposition (ALD) provides a means to achieve high-quality ultrathin dielectric films below 300 °C, but the hydrophobic and chemically inert nature of the graphene surface inhibits direct application of ALD oxides. Several methods have been utilized to functionalize the surface of graphene for ALD including: deposition of a metal seed layer^[1], an ozone pretreatment^[2], and using a low-κ polymer seed layer^[3]. Although some success has been achieved, these techniques are complex and often result in degradation of the graphene mobility. In this work, we present a simple wet chemical surface treatment which functionalizes the surface of graphene and results in conformal, uniform Al₂O₃ films.

Epitaxial graphene was synthesized on semi-insulating, on-axis 4H- and 6H-SiC substrates (16x16mm²) using an Axitron/Epigress VP508 SiC growth reactor at temperatures from 1600 to 1650 °C for a duration of 60 to 180 min. Samples were grown in an Ar ambient at a constant pressure of 100 mbar. All samples underwent an optimized wet chemical surface treatment before oxide deposition to render the graphene susceptible to ALD process. This ex-situ treatment consisted of an HF dip (25 wt. %) for 2 min. at room temperature followed by soaking in SC1 (1 H₂O₂:1 NH₄OH:5 H₂O) at 80 °C for 10 min. Samples were then rinsed in DI and blown dry in N₂. ALD of Al₂O₃ was carried out in a Cambridge NanoTech 200 at 225 °C with trimethylaluminum and deionized (DI) water precursors, under conditions which yielded a growth rate of ~1.1 Å/pulse cycle. Initial pulse sequences and final oxide thickness (10-30 nm) were varied to determine the effect on oxide coverage. Al₂O₃ coverage and uniformity was characterized with atomic force microscopy, scanning electron microscopy, and X-ray photoelectron spectroscopy, while mobility changes were ascertained with van der Pauw Hall measurements.

Results show that a 30 nm conformal, uniform Al₂O₃ film can be obtained using a simple wet chemical surface treatment prior to ALD. Mobility was maintained indicating little impact of the pretreatment or deposited oxide on the underlying graphene properties. While the initial pulse sequence had minimal effect on the coverage and uniformity of thick films, it is a significant factor in obtaining conformal thin films (< 30 nm). Better coverage with thinner films was achieved using 10 initial water pulses. Key to the success of this approach is the ability to nucleate on both terraces and step edges. Variations in coverage as a function of oxide thickness and deposition temperature will also be discussed.

Since graphene growth on Si-face SiC substrates results in a surface morphology with step heights on the order of 5-10 nm, only the 30 nm oxide was completely uniform. We hypothesize that the steps inhibit deposition of ultrathin conformal films (≤ 10 nm) needed for scaling of devices. Therefore, we have deposited thin Al₂O₃ films on step-free graphene mesas^[4] to elucidate the affect of steps on oxide uniformity and obtain the ultimate limit of this wet chemical approach.

[1] J.A. Robinson, et.al. ACSNano 4(5) 2667-2672 (2010).

[2] B.Lee, et.al. ECS Transactions 19(5) 225-230 (2009).

[3] D.B. Farmer, et. al. Nano Letters 9(12) 4474-4478 (2009).

[4] L.O.Nyakiti, et.al. presented at STEG conference, Amelia Island, FL 2010.

Hematite (α-Fe₂O₃) is a promising material for sustainable generation of H₂ due to its low cost, widespread availability, chemical stability, and ability to absorb a significant fraction of visible light. However numerous challenges remain in order for this material to approach its theoretical potential of 15% solar to hydrogen efficiency. The two most important metrics for photocurrent are its onset potential and the current plateau. The latter is a measure of the fraction of photo-generated carriers that are extracted to perform water splitting. In this work we address this challenge through the production of oriented nanorod arrays on fluorine-doped tin oxide (FTO) coated glass using the approach developed by Vayssieres and coworkers.[1] This simple aqueous solution method is scalable and employs low cost precursors. In previous studies well-developed arrays of vertical nanorods were formed, by unfortunately such structures yielded poor photoelectrochemical performance (<5 µA/cm²).[2] In this paper it is shown that the temperature used for post-deposition calcination has a profound impact on material properties and performance. The critical temperature is found to be ~725 ºC. Films calcined below this temperature displayed negligible photocurrent, while samples treated at above had dramatic improvement in photocurrent density. The enhanced performance is correlated with increased optical absorption and improved crystallinity, which are thought to enhance carrier generation and transport, respectively. Electron microscopy and energy dispersive spectroscopy suggests that significant diffusion of tin from the FTO into the Fe₂O₃ matrix occurs during high temperature annealing process. The benefits of this process may include enhanced conductivity as well as improvement of the FTO/ Fe₂O₃ interface. Initial testing of these films under simulated sunlight produced photocurrent densities >300 µA/cm² at 1.23 V versus the reversible hydrogen electrode, a 100-fold increase over previous reports. In this presentation we will discuss the sensitivity to process conditions, and update further improvements achieved to the system.

References

[1] L. Vayssieres, N. Beermann, S. E. Lindquist, and A. Hagfeldt, "Controlled aqueous chemical growth of oriented three-dimensional crystalline nanorod arrays: Application to iron(III) oxides," , 233-235, (2001).

[2] N. Beermann, L. Vayssieres, S.-E. Lindquist, and A. Hagfeldt, "Photoelectrochemical Studies of Oriented Nanorod Thin Films of Hematite," , 2456-2461, (2000).

Although amorphous silicon photovoltaics is a mature commercial technology, these potentially low cost thin film photovoltaic devices still suffer from either incomplete absorption of the light that excites electrons to higher energy states where they can generate electrical power or the loss of these energetic electrons in the material before they can be collected. This results in a tradeoff between producing a cell thick enough to absorb the incident light but thin enough that excited electrons can be extracted from the silicon before they are lost to recombination through electron traps (that are present at high density in these low cost thin films). To overcome these problems, complicated triple junction cells are fabricated that reduce these problems but increase the costs to rival that of crystalline cells.

We propose to address this trade off by changing the amorphous silicon layers from planar to a vertical 3-D nanostructured geometry that will result in long optical absorption paths and high light absorption even for very thin silicon layers. Choosing the dimensions of the nanostructured vertical geometry carefully will also result in low top surface reflection. The combination of low surface reflection, long optical absorption path length, and reduced electron trapping will yield significantly higher thin film device quantum efficiencies. The much thinner required layers will also result in higher throughput for expensive Si deposition equipment.

Modeling the increased path length in amorphous Si:H indicates the increase in absorption due to the vertical geometry could be in the range of 30 %. The vertical geometry will introduce several other effects that should increases efficiency over current practice, these effects include improved series resistance, electrical contact geometries, reduced reflection, and stability gains. There are also negative secondary factors that must be considered; these include a larger junction interfacial area resulting in both a larger dark current and a larger doped semiconductor absorption loss. Factoring in these positive and negative effects, we fully expect to demonstrate vertical cells with efficiency gains of at least 15% relative to planar control cells. This would be a very significant gain as amorphous silicon is currently considered a relatively stable, well developed technology.

It is essential that these vertical structures be fabricated at low cost. To fabricate these structures, we formed three dimensional nanoscale vertical patterns in a polymer layer on a glass substrate. This pattern acts as a template during Si device layer deposition to generate the desired vertical device geometry. The nanostructured template has high aspect ratio features down to 300 nm and would add far too much cost if standard nanofabrication patterning and etching processes were used, consequently we have developed templates using a low cost high aspect ratio polymer molding process that allows us to rapidly create these structures. Amorphous silicon PIN layers have been deposited on these templates and we have performed optical transmission and reflection studies on the patterned and unpatterned regions of the samples to determine the effects of templated fabrication on light capture.

Deposition of device-quality microcrystalline silicon thin films at an adequate rate is a key challenge in the fabrication of thin film silicon tandem photovoltaic modules for viable large-scale power generation. Conventionally films are deposited using sinusoidal RF excitation of parallel plate reactors containing lean H₂-SiH₄ mixtures. Higher voltages increase the deposition rate, but also increase the ion bombardment energy which degrades the film, thus limiting the deposition rate of high quality films to »1 nm/s for RF excitation at 13.56 MHz. We have investigated plasma excitation using non-sinusoidal waveforms to decouple the injected RF power from the ion bombardment. Films were deposited in Ar/SiF₄/H₂ plasmas and were characterised using in-situ spectroscopic ellipsometry.

We demonstrate the application of RF waveform tailoring to generate an electrical asymmetry in a capacitively coupled plasma-enhanced chemical vapor deposition system, and its use to control the growth mode of hydrogenated amorphous and nanocrystalline silicon thin films deposited at low temperature (150°C ). A dramatic shift in the DC bias potential at the powered electrode is observed when simply inverting the voltage waveform from “peaks” to “troughs”, indicating an asymmetric distribution of the sheath voltage. By enhancing or suppressing the ion-bombardment energy at the substrate (situated on the grounded electrode), the growth of thin silicon films can be switched between amorphous and nanocrystalline modes, as observed using in-situ spectroscopic ellipsometry. The effect is observed at pressures sufficiently low that the collisional reduction in average ion bombardment energy is not sufficient to allow nanocrystalline growth (<100mTorr).

This work presents a new kind of ellipsometric data analysis applied to an Indium Tin Oxide thin film, characterized by an energy window of electromagnetic transparency capable of passing solar energy and at the same time having usable electron conductivity elsewhere. The work presents very recent advances in the n-k plane data analysis method that allow greatly improved accuracy in modeling these films for multiple layers. Solution accuracy is orders of magnitude better than least squares, the method in common use. It is well known that such materials are optically opaque (have high extinction coefficients, k) both at energies higher than the high energy window edge and at energies below the lower window edge. Such materials present a particular challenge to ellipsometry data analysis due to these different optical behaviors across the measurement wavelength range. Data reported here were taken on an Indium Tin Oxide (ITO) film grown on a silicon substrate to a nominal thickness of 400 nm. Measurements were taken at 293 wavelengths, every 5 nm from 280 to 1700 nm, and at each of three incidence angles of 55°, 65°, and 75°. Thus at each wavelength (experiment) there are three measurements providing 6 real numbers, three each of Ψ and Δ. Each Ψ-Δ pair results in set of solution curves on different root and logarithm planes, for which the one containing the film solution is readily identifiable. If measurements had no experimental uncertainty, the three curves per experiment would intersect at the value of film n, k, and d. In actual fact they come close to intersecting and have a point of closest approach. In cases for which the intersection is well defined, and there are six real number unknowns which may, in principle, be determined. We have chosen the six variables to represent the thickness and optical properties of two layers on the substrate, one computation per wavelength. In the transparent region from approximately 300 to 980 nm the ITO matches a 2 layer film divided into two near-equal thicknesses with somewhat differing index real part and with an extinction coefficient near zero. At longer wavelengths the film corresponds to an absorbing layer which appears vertically inhomogeneous but which cannot be well characterized due to the light interaction depths at the three incidence angles. Results will be presented across the entire measurement wavelength range.