ALD/ALE 2021 Session AA12: Display Applications: Thin Film Transistor, Diodes, Thin Film Encapsulation for OLEDs/QDs...
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(267KB, Jun 9, 2021)
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AA12-1 Two-dimensional electron gas at atomic-layer-deposited ZnS/ZnO Heterostructure
Jae Hyun Yoon, Tae Jun Seok, Yuhang Liu, Ji Hyeon Choi, Sang June Kim, Tae Joo Park (Hanyang University); Sang Woon Lee (Ajou University) Recently, two-dimensional electron gas (2DEG) has attracted great attention due to its presence at various heteroepitaxial perovskite oxide interfaces. Typically, epitaxial LaAlO3/single-crystal SrTiO3 (LAO/STO) heterostructure shows high density of electrons (~10^13-10^14 cm^-2) confined at the oxide interface, where the density is about ~100 times higher than that of a typical semiconductor interface (~10^11-10^12 cm^-2).[1] Creation of 2DEG is conventionally defined on the basis of discontinuity in polarity linked with the difference in the charge of the atomic layers. Simply, it can be described as half an electron charge being transferred to the interface to avoid a potential divergence, ‘polar catastrophe’.[2] Another mechanism is associated with the generation of oxygen vacancies (Vo) at the surface of the STO layer during LAO or Al2O3 layer deposition, acting as electron donor for the 2DEG formation. It provides an opportunity for 2DEG realization for various oxide heterostructures and fabrication processes. Recently, we reported Vo generation mechanism-based 2DEG formation process using atomic-layer-deposited (ALD) ultrathin (~10 nm) binary metal oxide heterostructure.[3] 2DEG layer can be formed at the interface of an ultrathin Al2O3/TiO2 heterostructure on standard SiO2 substrate at a low temperature |
AA12-2 Three-Dimensional Multi-Stacked Field-Effect Transistor Using Two-Dimensional Electron Gas at the Interface ofAl2O3/ZnO Ultra-Thin Film Heterostructures
Ji Hyeon Choi, Tae Jun Seok, Jae Hyun Yoon (Hanyang University, Korea); Sang Woon Lee (Ajou University); Tae Joo Park (Hanyang University, Korea) Two-dimensional electron gas (2DEG) has been realized with various fabrication process using diverse oxide heterostructure since epitaxial LaAlO3/single-crystal SrTiO3 (LAO/STO) heterostructure was reported as a typical 2DEG system, which shows high density of electrons (~1013-1014 cm-2) confined at the oxide interface. The origin of 2DEG created at the heterointerface is still controversial mainly between the discontinuity of polarity at the atomic layers, inducing electron charge reconstruction and the presence of oxygen vacancies (Vo) at the interface, widely known as electron donors. Recently, we reported Vo generation mechanism-based 2DEG formation process using atomic-layer-deposited (ALD) ultrathin (~10 nm) binary metal oxide heterostructure: amorphous Al2O3/polycrystalline TiO2, whose electrical property is comparable with typical LAO/STO epitaxial 2DEG system at room temperature (sheet carrier density, nsh= ~1014 cm-2, electron mobility, μn= ~4 cm2V-1s-1). To demonstrate Vo generation mechanism for 2DEG creation specifically, an in-situ resistance measurement was conducted to prove the presence and effect of Vo at the heterointerface. The resistance of the interface dropped significantly with the injection of trimethylaluminum (TMA) molecules, indicating that Vo were formed on the TiO2 surface during the TMA pulse in the ALD of the Al2O3 film, such that they provide electron donor states to generate free electrons at the interface of the Al2O3/TiO2 heterostructure, creating 2DEG. Being well-informed of this mechanism, ZnO as a different bottom material was applied for oxide heterostructure 2DEG system to improve electrical and structural property of TiO2-based 2DEG due to its excellent intrinsic property. As expected, the Al2O3/ZnO heterostructure exhibited enhanced electrical properties (nsh= ~1014 cm-2, μn= ~15 cm2V-1s-1), even at the lower thickness of bottom layer (~ 5 nm) and lower deposition temperature (150oC). In this work, using ultrathin Al2O3/ZnO 2DEG layer as a channel, we succeeded to fabricate 2DEG field-effect transistors (FETs), achieving extremely low off-current (Ioff ~10-9 A/m), high on/off current ratio (Ion/Ioff > ~109), and low subthreshold swing (SS ~95 mV/dec.), which outperforms other oxide heterostructure-based FETs reported so far, including the previous work of TiO2-based 2DEG system.Furthermore, due to facile film deposition with excellent thickness control of ALD, stacking 2DEG layers is possible to make three-dimensional multi-stacked 2DEG FETs, leading to great conductivity resulting from accumulated electron transport path. The detailed experimental results will be presented. |
AA12-3 Atomic Layer Deposited p-type SnO Thin Film Transistors
Kham Niang (Cambridge University); D. Gomersall (Cambridge University, UK); J.D. Parish, A.L. Johnson (University of Bath, UK); A.J. Flewitt (Cambridge University, UK) In the past decade, extensive research has been carried out on p-type oxide semiconductor materials for realisation of complementary metal oxide semiconductor (CMOS) circuits. In particular, SnO is of great interest due to its disperse valence band maximum due to hybridization between O 2p and Sn 5s orbitals, allowing a relatively high hole mobility [1]. While sputtering method has been widely used for SnO, atomic layer deposition (ALD) has not been widely reported [2]. ALD is a very attractive technique due to its precision on stoichiometry arising from the self-limiting growth, its repeatability and its conformality over a large substrate area [3]. In this report, SnO thin films were deposited using a novel Sn precursor and H2O in a cross-flow wafer scale ALD reactor. The precursor bottle was heated at 100°C and depositions were carried out at temperatures between 170 and 210°C. To achieve high quality films suitable for channel layers in thin film transistors (TFTs), we investigated three deposition modes: single pulse (SP), multiple pulses (MP) and multiple pulses and exposure (MP+E). The SP mode is the standard ALD process comprising of the Sn and H2O half cycles. The pulse/purge times of 1s/15s and 0.03s/10s are used for the Sn and H2O cycles respectively. In the MP mode, three consecutive Sn pulses are applied with 5 s delay between the pulses which is then followed by the H2O half cycle. The MP+E mode is a combination of the MP mode and stopping of the gas flow for 10s to increase the residence time in the chamber. P-type SnO thin films were then incorporated as a channel layer in TFTs. A field effect mobilities of 0.5 and 2.5 cm2V-1s-1 were achieved for TFTs annealed at 250°C and 350°C respectively. We will discuss in detail the effect of different ALD deposition modes on the characteristic of the thin films and the performance of the TFTs. [1] J. A. Caraveo-Frescas, P. K. Nayak, H. A. Al-Jawhari, D. B. Granato, U. Schwingenschlogl, and H. N. Alshareef, ACS Nano, vol. 7, no. 6, pp. 5160-5167, 2013. [2] J. H. Han, Y. J. Chung, B. K. Park, S. K. Kim, H.-S. Kim, C. G. Kim, and T.-M. Chung, Chemistry of Materials, vol. 26, no. 21, pp. 6088-6091, 2014. [3] S. George, Chem. Rev. 110, 111 (2010). |
AA12-4 The Impact of PEALD InGaO TFT Performances on Paring In/Ga Precursor Structures
TaeHyun Hong, Hyun-Jun Jeong, Jin-Seong Park (Hanyang University, Korea) Recently, ALD oxide semiconductor has been attractive as TFT material that has the potential for high mobility and stability compared to conventional method due to precisely controlled thickness and metal composition. However, multi-component deposition using ALD is difficult to control without understating growth mechanism according to precursor and reactant, it is necessary to study and library the adsorption and reactivity of the surface depending on various precursor. In this study, InGaO (IGO) semiconductors were deposited by plasma enhanced atomic layer deposition (PEALD) using two sets of In and Ga precursors, which one set is In(CH3)3[CH3OCH2CH2NHtBu] (TMION) and Ga(CH3)3[CH3OCH2CH2NHtBu]) (TMGON) and the other is (CH3)2In(CH2)3N(CH3)2 (DADI), (CH3)3Ga (TMGa), as denoted as TM-IGO and DT-IGO, respectively. We changed the ratio of InO sub-cycles from 3 to 19 to control the chemical composition of ALD-processed films. The different growth properties are observed at different precursor set. This could be originated from the precursor structure and the density of adsorption sites. Despite this different growth behavior, it could set the IGO TFTs with the identical In/Ga ratio controlling each super-cycle. Interestingly, the both TFTs (TM-IGO and DT-IGO) showed different film properties and the associated TFT characteristics (TM-IGO: -5.5V, 36.7 cm2/Vs, DT-IGO: -9.7V, 27.7 cm2/Vs for the Vth and mobility respectively). This difference could be originated from not only the growth behavior but also the anion/cation ratio/binding states in the IGO thin films. |
AA12-5 Structural Modulation of ALD IGZO TFT for Controlling the Hydrogen Concentration
Wan-Ho Choi, KyoungRok Kim, Jin-Seong Park (Hanyang University, Korea) Nowadays, a novel deposition technique for thin film transistor (TFT) application using atomic layer deposition (ALD) such as semiconductor, gate insulator (GI), and encapsulation has been studied extensively. Herein, we developed unified-ALD (U-ALD), which deposits buffer, semiconductor and GI by ALD and named this structure as sandwich structure. In U-ALD IGZO TFTs, material forming interfaces with the channel layer exhibited a critical role in the electrical performance of IGZO TFTs because of hydrogen (H) diffusion, which has a Janus-faced effect in IGZO. Through measurement of hydrogen permeability of ALD insulators and Secondary Ion Mass Spectroscopy of each sandwich structure after annealing, we found a hydrogen accumulation effect in the ALD IGZO layer like a dam, which caused degradation of TFT properties. In contrast, TFTs with ALD SiO2, which has proper hydrogen diffusivity, chosen as the buffer and GI had favorable electric properties of 28.17 cm2/Vs, 0.20 V/decade, 0.96 V, and 0.12 V for the mobility, Vth, SS, and hysteresis. In this regard, an optimized GI structure via the ALD SiO2 and Al2O3 in situ process on the basis of excellent interface formation with the semiconductor and hydrogen barrier performance, respectively, was developed. This functional GI structure with SiO2 and Al2O3 exhibited proper TFT characteristics (27.52 cm2/Vs, 0.24 V/decade, and 1.07 V for the mobility, SS, and Vth, respectively) and improved stability against hydrogen annealing, which was used to examine the resistance to external hydrogen. |
AA12-6 Ultrathin Amorphous Titanium Oxide Field-Effect Transistors with Large Gate-Induced Electron Mobility Modulation
Nikhil Tiwale (Brookhaven National Laboratory); Ashwanth Subramanian (Stony Brook University); Zhongwei Dai (Brookhaven National Laboratory); Sayantani Sikder (Stony Brook University); Jerzy T. Sadowski (Brookhaven National Laboratory); Chang-Yong Nam (Brookhaven National Laboratory/Stony Brook University) Recent reports show a great promise of using ultrathin metal oxide films prepared by atomic layer deposition (ALD) for enabling high performance devices featuring ultra-sharp subthreshold swing and even the formation of two-dimensional electron gas (2DEG). A key characteristic of ultrathin metal oxide thin-film transistors (TFTs) is their very low off-state current with a sharp and high on off ratio. While the on-off operation in typical TFTs primarily results from the modulation of gate-dependent charge carrier density, recent reports suggest that the high on-off ratio in ultrathin oxide TFT operation can be associated with a large gate-induced carrier mobility modulation, which few reports provide a clear picture regarding its origin and implication. In this study, we study the 3.5 nm-thick amorphous-titania-based ultrathin TFT fabricated by low-temperature ALD, which exhibited six-decade on-off ratio predominantly driven by the same magnitude of gate-induced mobility modulation [Tiwale et al., Commun. Mater.1, 94 (2020)]. We observe that the power law dependence of gate-dependent saturation mobility featured a very high exponent at low gate voltages, unprecedented for oxide TFTs reported so far. Drawing parallels from the disordered organic TFT that exhibits similarly high power law exponent, and by combining the physicochemical analysis of titania prepared under varying post-ALD thermal treatments and the accompanying TFT device characterization, we identify that the large gate-induced mobility modulation originates from the variable range hopping (VRH) transport of charge carriers through the band-tail states of ultrathin titania, with its bi-exponential density of states reflected on the observed two different power-law exponent regimes in the gate-dependent mobility. The results highlight rather unusual and counterintuitive roles of defect states within ultrathin metal oxides in possibly enabling some of the high performance parameters in associated TFT devices, as best exemplified by the increased off-state current accompanied by the reduced device on–off ratio upon the oxidative annealing of ultrathin titania, against the typical notion that such an oxidative annealing in metal oxide transistors would reduce the background carrier density while increasing the on–off ratio. |