Ice formation and accretion present serious safety issues for aircraft, the automotive industry, signalling devices, railway systems, buildings, wind energy conversion plants, terrestrial power lines and many others. Considerable effort has been devoted to tackle this crucial yet challenging issue, mainly by developing anti-icing coatings that, based on the idea that a non-wetting material would diminish the water-surface contact and avoid the ice formation, link the hydrophobic properties of the materials with a supposed anti-icing function. However, it has been demonstrated that this rule is not always true, as in very humid environments ice can form on superhydrophobic materials.

One of the primary motivations for development of instrumented indentation was to measure the mechanical properties of thin films. Characterization of thin film mechanical properties as a function of temperature is of immense industrial and scientific interest. The major bottlenecks in variable temperature measurements have been thermal drift, signal stability (noise) and oxidation of/condensation on the surfaces. Thermal drift is a measurement artifact that arises due to thermal expansion/contraction of indenter tip and loading column. This gets superimposed on the mechanical behavior data precluding accurate extraction of mechanical properties of the sample at elevated/cryogenic temperatures. Vacuum is essential to prevent sample/tip oxidation at elevated temperatures and condensation at cryogenic temperatures.

In this poster, the design and development of a novel nanoindentation system that can perform reliable load-displacement measurements over a wide temperature ranges (from -150 to 800 °C) will be presented emphasizing the procedures and techniques for carrying out accurate nanomechanical measurements. This system is based on the Ultra Nanoindentation Tester (UNHT) that utilizes an active surface referencing technique comprising of two independent axes, one for surface referencing and another for indentation. The differential depth measurement technology results in negligible compliance of the system and very low thermal drift rates at high temperatures. The sample, indenter and reference tip are heated/cooled separately and the surface temperatures matched to obtain drift rates as low as 1nm/min at 800 °C without correction. Instrumentation development, system characterization, experimental protocol, operational refinements and thermal drift characteristics over the temperature range will be presented, together with a range of results on different materials.

Nano-machining methods like single point diamond turning (SPDT) and fly cutting (FC) are used to fabricate high-quality active surfaces of X-ray crystal optics. In this contribution, experimental results from Ge and Si surfaces will be used to demonstrate sub-surface damage (SSD) of the crystal lattices after various machining steps. The machined surfaces are characterized using atom probe microscopy, transmission electron microscopy (TEM), focused ion beam milling, scanning electron microscopy and Raman spectroscopy. The results reveal that the SSD and residual stresses correlate with the machining conditions. The morphology of surface ripples as well as a periodic variation of Raman peak shift are observed and correlated. TEM results are used to demonstrate the influence of the machining on the cross-sectional lattice damage.

This work was supported by projects APVV-14-0745 and VEGA 2/0004/15 and FFG M-ERA.net project 841930 XOPTICS.

In this work results are presented for the deposition of thin multilayer structures, SiO2/a-Si:H/SiO2, by electron cyclotron resonance-chemical vapor deposition (ECR-CVD) technique. The ECR remote plasma systems present excellent characteristics that allow deposition of high quality uniform films at room temperature suitable for application in CMOS technology.

The depositions were carried out at an applied microwave power of 250 W under a gas pressure of 2.0 mTorr and a substrate temperature of 20°C. SiO2 film with thickness of ~6-8 nm were deposited using O2 and 2% SiH4 diluted in Ar as precursor gases. Hydrogenated amorphous silicon (a-Si:H) films with thickness of ~3-4 nm were deposited using the same flows of SiH₄ and Ar as in the case of SiO₂ but without O₂ flow. The films were deposited on p-type (100) c-Si substrates.

The film thicknesses in the multilayer structures were evaluated using the deposition rates of the a-Si:H and SiO₂. Individual layers of SiO₂ and a-Si:H were deposited on c-Si wafer and their thicknesses were determined ellipsometrically. As-deposited films were annealed at 800°C and 1100°C in N₂ atmosphere for 60 minutes.

Three-layer MOS structures were patterned by lithography and sintered in forming gas for 20 min. The influence of high temperature post-deposition annealing on the electrical properties of the structures was studied by current-voltage (I-V) and capacitance-voltage (C-V) measurements.

I-V measurements indicated that the high temperature annealing improves the gate dielectric properties. The C-V dependencies showed a correlation between the annealing temperature and the memory window of the structures. A possible explanation is that the high temperature annealing leads to structural modifications and formation of traps suitable to trap carriers. In addition, a strong improvement of the insulating properties of the SiO2 films was observed. Both changes may contribute to the observed memory effect. The obtained results show that the studied structures have a potential for application as gate insulators in non-volatile memory devices.