AVS 72 Session AM+EM+TF-ThP: Advanced Microelectronic Materials and Devices Mini-Symposium Poster Session

Electronic systems capable of operating in harsh environments—including space exploration (e.g., Venus and near-solar probes), aeronautics, oil and gas exploration, nuclear power plants, and heavy industrial processes—must withstand extreme temperatures and radiation. These applications demand in situ computing and sensing with stable performance under extreme conditions. However, no NVM technologies reliably function above 250 °C, creating a critical gap in high-temperature electronics. Despite well-established high-temperature logic with reliable operation > 800 °C, the absence of a compatible NVM technology hinders fully integrated computing for extreme environments. Ferroelectric diodes (FeDs) are promising candidates for selector-free, non-volatile memory (NVM) due to their nonlinear current–voltage behavior, potential multistate operation, and simple two-terminal architecture. For harsh-environment electronics, however, maintaining a high ON/OFF ratio and stable switching at elevated temperatures remains a major challenge, largely due to stronger internal fields and increased charge trapping.

In this work, we have successfully grown 45 nm of Al₀.₆₈Sc₀.₃₂N on TaSi₂ despite the large lattice mismatch. TaSi₂ is a well-known high-temperature metal electrode and has been employed in NASA’s Junction Field Effect Transistors (JFETs). The XRD omega scan of Al₀.₆₄Sc₀.₃₆N reveals a full width at half maximum (FWHM) of 4.06°. Stacks with and without an AlOₓ interlayer were compared to evaluate the role of interfacial engineering in leakage suppression, switching behavior, and ON/OFF ratio retention at elevated temperatures. The devices consisted of Ni top electrodes, a ~10 nm AlOₓ interlayer (IL) dielectric, a ~45 nm AlScN ferroelectric layer, and TaSi₂ bottom electrodes.

Temperature-dependent DC-IV, AC-IV, and Positive-Up Negative-Down (PUND) measurements were performed up to 800 °C. For the 32% Sc AlScN device without an IL dielectric, the ON/OFF ratio remained measurable, decreasing from ~10 at 25 °C to 2.37 at 800 °C. By contrast, devices with an AlOₓ IL dielectric exhibited substantially higher ON/OFF ratios, reaching values above 500 at room temperature and ~6 at 800 °C. These results highlight the role of AlOₓ interfacial engineering in suppressing leakage and improving state distinguishability at elevated temperatures. High-temperature ferroelectric polarization switching, and other NVM characteristics such as read and write endurance, retention measurements of the ferrodiodes of Al₀.₆₈Sc₀.₃₂N on TaSi₂ with 10 nm AlOₓ IL dielectrics up to 900 °C are currently underway and will be presented at the meeting.

The integration of metallic nanoparticles (NPs) has revolutionized the fabrication of flexible electronic devices. Compared to their bulk counterparts, metallic NPs exhibit unique shape and size-dependent properties that make them indispensable to the electronics industry. However, achieving superior electrical conductivity requires specialized post-processing to remove the stabilizing agents and additives used during NP synthesis.

In this study, silver (Ag) and copper (Cu) NP inks were employed to fabricate conductive patterns via printing and sintering processes for flexible electronics applications. These inks were printed onto 0.1 mm thick flexible Kapton polyimide (PI) sheets. The Ag ink was formulated with a solid content of 42±2 wt%, a density of 1.6 g mL^-1, and a viscosity of 3.5-6.0 Pa S at 10 s^-1. The Cu NP ink featured a solid content of 88 wt%, a density of 3.9 g mL^-1, and a viscosity of 20-40 Pa S at 50 s^-1.

Metal NP patterns were printed using a single-nozzle printing system and subsequently dried and sintered under four distinct sintering conditions: thermal treatment only (TO), laser irradiation only (LO), thermal treatment followed by laser irradiation (TL), and laser irradiation followed by thermal treatment (LT). This allowed for a comprehensive comparison of single and dual sintering techniques on the physical, chemical, mechanical, and electrical properties of the metal patterns. Post-sintering evaluations include microstructure analysis, crystallography, chemical composition, electrical sheet resistance, and mechanical strength.

Wurtzite ferroelectrics based on the composition Al₁₋ₓMₓN, with M representing transition metals, have shown to possess large remnant polarization values, and higher thermal stability than conventional ferroelectrics like lead zirconate titanate (PZT) or barium titanate (BTO), and thus find potential applications in high operating temperature non-volatile memories. In this study, transmission electron microscopy (TEM) and scanning transmission electron microscopy-based energy-dispersive X-ray spectroscopy (STEM-EDS) were employed to investigate the structural and chemical characteristics of a stack comprising of a silicon substrate, titanium bottom electrode with a thin TiN layer, Al_0.92Ti_0.08N thin film and tungsten top electrode. Al_1-xTi_xN based wurtzite thin films have previously been used for piezoelectric applications, and have potential ferroelectric applications, if polarization switching by the application of external electric field can be shown. Electron-transparent cross-section lamellae were prepared from the stack using focused ion beam (FIB) milling to enable site-specific TEM/STEM analysis. Bright-field (BF) and dark-field (DF) TEM images revealed a fiber-texture in the film with columnar grains aligned parallel to the growth direction. Zone-axis diffraction patterns (ZADPs) acquired from the film demonstrated wurtzite phase purity and c-axis oriented growth of the film. STEM-EDS revealed uniform distribution of Al, Ti and N throughout the film, further confirming wurtzite phase purity, which is essential for ferroelectric switchability.

Multi-component oxide IGZO (In_xGa_yZn_zO_p) has been proposed as the channel material enabling low-cost and scalable future 3D-DRAM technology [1], [2]. This application would necessitate uniform deposition in high pattern density, high aspect ratio (HAR) structures. However, benchmarking of conformality and compositional uniformity in HAR structures is lacking in literature. With this objective, IGZO ALD deposition has been studied within deep hole features with two different aspect ratios (7:1 and 90:1). As a first step, a baseline deposition recipe was developed on blanket substrates. TMIn, TMGa and DEZ precursors were chosen due to their relatively high vapor pressures and well understood ALD processes. An optimal 200˚C deposition temperature avoids decomposition of DEZ and TMIn above 250˚C, while overcoming low growth-rates of GaO_x below 200˚C. Precursors and Reactant (O₃) dose times were separately optimized to ensure growth saturation, with GaO_x growth typically needing ~20x the O₃ dose time to ensure complete reaction, as compared to InO_x, ZnO_x. Based on these optimizations, carbon content in the developed IGZO films were found to be below the detection limit of X-ray photoelectron spectroscopy (XPS). The initial blanket baseline recipe (not optimized for HAR depositions) comprising of In-O-Ga-O-Zn-O growth sub-cycles yielded 50% coverage (bottom/top sidewall) for a 7:1 HAR structure, and 25% coverage for the 90:1 case. Specifically, In (precursor with highest molecular weight and lowest vapor pressure) saw a 21% to 38% reduction in partial fraction from top to bottom, whereas was partially compensated by Ga and Zn partial fractions increase that ranged around -3% to 20% in the different structures. Continuous coverage and compositional uniformity improvements are planned, with longer dose times as one of the knobs (and with particular emphasis on the In component).

1. D. Ha et al, "Exploring Innovative IGZO-channel based DRAM Cell Architectures and Key Technologies for Sub-10nm Node," pp 1-4 IMW (2024)

2. M. Okajima et al, "Highly stackable Oxide-semiconductor Channel Transistor Technology for Future High-density and Low-power 3D DRAM," pp 1-4 IEDM (2025)