AVS 69 Session CPS+CA-WeA: CHIPS Act: Interfaces and Defects

Recent advancements in epitaxial growth and substrate development continue to inspire the next generation of wide-bandgap (WBG) semiconductor devices. In the last decade, the silicon carbide (SiC) and gallium nitride (GaN) material systems have seen extraordinary advancements that allow an increased commercial device adaptation. However, there still exists many reliability concerns that directly impact device manufacturing. These concerns manifest in our inability to accurately quantify and mitigate interface charge effects and material defects that exist within device structures due to growth conditions and processing limitations. Commercial endeavors will continue to address such concerns for WBG devices, but it is crucial that the research community complements and promotes these efforts through advanced interfacial metrology methods that can be applied to both current WBG devices and future ultra-wide-bandgap (UWBG, E_g > 3.4eV) materials and devices, thus enabling the next leap forward in electronic device performance. These include materials such as high-Al-content AlGaN/AlN, Ga₂O₃, cubic BN, diamond, and others. Due to device performance scaling approximately as E_g⁶, there exists substantial potential that has yet to be fully embraced in UWBG devices.

Interfacial metrology is a broad topic area that encompasses numerous thermal, mechanical, chemical, optical, and electronic properties at (dis)similar material interfaces. It is inextricably linked to our ability to develop devices that fully exploit the electronic capabilities of a given material system. This talk discusses current optical, acoustic, and electrical characterization efforts at Sandia and within the broader community to visualize and quantify interfacial properties, defects, and undesirable electronic charges within (U)WBG materials and devices. Specifically, a coupled hyper-spectral frequency-domain thermoreflectance/laser doppler vibrometry (FDTR/LDV) system that allows for enhanced understanding of thermal/mechanical properties of buried interfaces with a sensing depth greater than standard FDTR approaches has been implemented. Additionally, an improved quasi-static capacitance analysis method has been developed to more accurately evaluate interface traps at dielectric/(U)WBG material interfaces. Direct optical and photoemission approaches are becoming increasingly difficult to effectively utilize as larger bandgap devices are developed, necessitating the need for advanced thermal, vibrational, and electronic analysis methods. Future interfacial metrology efforts will require non-destructive methods that are capable of highly resolved in-situ full-field monitoring of buried interfaces within a device.

SNL is managed and operated by NTESS under DOE NNSA contract DE-NA0003525

Diamond is an ultra-wide bandgap semiconductor displaying a high breakdown electric field, high thermal conductivity, and high carrier mobilities. These intrinsic properties are suitable for creating power conversion and communications devices. In order to utilize its full potential, however, the properties of its surfaces and interfaces to other materials used in combination are important. Hydrogen-terminated diamonds (diamonds with their surface carbon atoms covalently bonded with hydrogen atoms) are widely used to make field-effect transistors (FETs). They show p-type surface conductivity even when the diamonds are not doped intentionally. The surface conductivity is attributed to surface transfer doping; electrons in the valence band of diamond are transferred to acceptors in an adjacent coating material, thereby forming holes in the diamond surface. The acceptor material includes adsorbed water, NO₂ gas, and oxides such as Al₂O₃, MoO₃, and V₂O₅, and coating the diamond surface with an acceptor material has been thought to be necessary to generate the surface conductivity. However, the surface transfer doping is accompanied by negatively charged acceptors, which cause carrier scattering and reduce hole mobility. It also leads to normally-ON operation, a finite conductivity at zero gate bias, which is undesirable particularly in power electronics.

In this presentation, I will present current trends in diamond electronics and our recent work on the creation of high-performance hydrogen-terminated diamond FETs without surface transfer doping [1]. We transferred a cleaved single crystal of hexagonal boron nitride (h-BN) on hydrogen-terminated diamond and used it as a gate insulator. This is useful for avoiding the formation of defects, which occurs in conventional deposition techniques and can cause acceptor states [2]. In addition, the transfer was made without exposing the diamond surface to air, using a vacuum suitcase and an Ar-filled glove box, which reduced the density of atmospheric acceptors. Our FETs exhibited excellent ON-state characteristics such as a room-temperature mobility of 680 cm²V⁻¹s⁻¹, sheet resistance of 1.4 kΩ and gate-length-normalized ON current of 1600 μm mA mm⁻¹. These are among the best among p-channel wide-bandgap FETs. The FETs also exhibited normally OFF behavior with an ON/OFF ratio of 10⁸. Our new approach for making diamond FETs could lead to the development of high-performance wide-bandgap p-channel devices for power electronics and communications.

[1] Sasama et al. Nature Electronics 5, 37 (2022).

[2] Sasama et al. APL Materials 6, 111105 (2018); Phys. Rev. Materials 3, 121601(R) (2019); J. Appl. Phys. 127, 185707 (2020).

Hexagonal boron nitride (h-BN) exhibits a wide array of unique chemical and electrical properties that presents itself useful in numerous applications, such as a gate dielectric for high mobility diamond transistors,¹ increasing corrosion resistance,² or a device encapsulating material.³ h-BN can be epitaxially grown by chemical vapor deposition (CVD) on copper surfaces with any orientation, and a near perfect lattice match on the Cu(111) surface, making Cu an ideal substrate to study intercalation.^4,5 Intercalation of O₂ through h-BN to monitor oxidation of the Cu substrate can be studied during exposure to near ambient oxygen partial pressures (1-100 Pa),⁶ or following exposure to atmosphere.⁵ The oxidation occurs predominately at defects and/or grain boundaries in the h-BN, and occurs even at room temperature if the pressure is high enough (atm pressure), leading to a lifetime of a few weeks at these conditions for use of pristine unoxidized h-BN/Cu heterostructures.⁵ To better understand this intercalation behavior, we studied the intercalation of H₂ to observe the extent of recovery of the original metallic surface/interface after the h–BN/Cu_2-xO interface is formed. Using polycrystalline Cu foils with CVD grown h-BN after exposure to atmosphere for ~1 month as a model system, we assessed the reduction of the surface via two hydrogenation methods: (i) simple H₂ exposure of 10 Pa followed by annealing in vacuum (sequentially) and during H₂ exposure (simultaneously) (ii) exposure to a low power (75 W) H₂ remote plasma also using 10 Pa, allowing for H radicals to interact with the surface. With in situ x-ray photoelectron (XPS) and Auger electron spectroscopy (AES), we track the changes in surface chemistry following each hydrogenation attempt. Additionally, in situ scanning electron microscopy provides morphological maps of the foil surface. To further study this hydrogenation mechanism from a fundamental perspective, we utilized h-BN grown on single crystalline Cu(111) and collected in situ ambient pressure XPS for the reduction of an ordered cuprous oxide confined beneath h-BN. Ultimately, H-radicals and ions can attack the confined oxide and partially reduce the surface, yet we were unable to fully recover metallic Cu. Our results indicate the original metallic interface might be repaired without damaging the overlaying h-BN, which is of practical importance for development of h-BN encapsulated devices and interfaces.

¹Sasama, Y. et al. APL Mater 6 (2018)

²Li, L. H. et al. Adv Mater Interfaces 1 (2014)

³Lo, C.-L. et al. J Appl Phys 128 (2020)

⁴Naclerio, A. E. et al. Adv Mater, 2207374 (2022)

⁵Kidambi, P. R. et al. Chem Mater 26, 6380-6392 (2014)

⁶Diulus, J. T. et al. Towards 2D-confined catalysis on oxide surfaces. ACS Nano Submitted (2023)

At the University of Illinois at Urbana-Champaign we have set up two complimentary structures to enable workforce development in the field of semiconductor manufacturing. The first is a relatively new degree program, a "Masters of Engineering in Plasma Engineering". This is a non-thesis master's degree which specializes in plasma technology and science related to making the machines which make the chips. The flagship class is a plasma laboratory where the students operate and analyze the experiments themselves in Vacuum Technology, DC Plasmas, RF Plasmas, Langmuir Probes, Spectroscopy, Plasma Etching, Plasma PVD Deposition, Atmospheric Pressure Plasmas and Fusion Plasmas. The program can usually be finished in three semesters and is open to students from all fields of engineering and science.

This program can be coupled with sponsored research at the University, particularly through the Illinois Plasma Institute. Companies who are sponsoring research at Illinois can use the Masters program to recruit, retain or re-train employees. In the case of a current employee, that person goes to Illinois while still working for the company, perhaps being paid less than 100%. Their work role at Illinois is to help work on the research project that in being sponsored, and do other remote work. Their school role is to take the courses in the degree program which includes classes directly related to their work for the company itself. If the company pays for the tuition, the student is required to continue working for the company upon graduation for a limited time, or pay back the tuition. The company is ensured a better-trained more-educated employee. The student is ensured of a job.

Examples will be described, and a program outlined that could be set-up at any major University.

Germanium-tin alloys are of interest for infrared light detectors and lasers to increase capabilities in image and data capture and transmission, because they can have a direct band gap with more than about 7% tin. Remote plasma-enhanced chemical vapor deposition (PE-CVD) is particularly attractive for growth of Ge-Sn alloys because it enables low-temperature epitaxy directly on Si using common precursors GeH₄ and SnCl₄. The growth of such epilayers can be optimized with an initial high-temperature buffer layer. This presentation will focus on the characterization of this buffer layer using atomic force microscopy, ellipsometry, thin-film powder x-ray diffraction, and x-ray photoelectron spectroscopy (XPS) for different growth conditions.

Thin Ge and Ge-Sn buffer layers with 10-20 nm thickness were deposited on Si (100) substrates for one minute at temperatures from 360°C to 500°C varying the SnCl₄ flow. Ellipsometry spectra for all films show critical point structures in the E­­₁, E₁+Δ₁, and E₂ region of Ge, indicating that all layers are crystalline. A layer grown at 360°C without SnCl₄ is well described as an 11 nm thick layer of crystalline germanium with 2 nm of roughness. Adding SnCl₄ to the gas flow significantly reduces the height of the ε₂ maximum at E₂, indicating that the layer is rough. In addition, a new broad peak appears near 1.3 eV, which is attributed to plasmonic effects arising from metallic β-tin inclusions. The plasmon peak disappears in the layers grown at 490°C with the same SnCl₄ flow. We conclude that depositing the buffer layer with SnCl₄ at low temperatures leads to β-Sn precipitates, where plasmon oscillations can be excited, which are not present for high-temperature growth.

The tin contents in the layers were also estimated by x-ray photoelectron spectroscopy. While XPS measures the total amount of tin in the layers, the presence of substitutional tin in Ge_1-xSn_x alloy buffers is best determined with x-ray diffraction. The (002) diffraction peak is absent in our buffers grown without SnCl₄ or at high temperature. The (004) XRD peak position in these layers is also very similar to pure Ge. The Ge_1-xSn_x (002) peak does appear in buffers grown at temperatures lower than 460°C. From the position of the (004) XRD peak, we estimate the tin content to be below 7%. Tin content determined from XRD shifts is much lower than the total tin content of about 20% estimated by XPS.

In summary, the substitutional tin content in thin Ge_1-xSn_x buffer layers grown by PE-CVD is modulated by temperature and SnCl₄ flow rates. Excess tin is present in β-tin precipitates, which lead to plasmonic resonances in ellipsometry spectra.

This research examines the effects of heat treatment processes on the mechanical properties and corrosion resistance of 1045 and 4140 Steel Alloys for industrial applications. Heat treatment processes of full annealing, normalizing, quenching, and tempering are carried out on the alloy samples. The mechanical and corrosion resistance tests of the heat treated samples are carried out and the results obtained are related to their morphologies analysis. The results show that the heat treatment processes have an effect on the tensile strength, impact, and a significant effect on the corrosion resistance of the alloy samples. With respect to the strain characteristics, significant improvement in the ductility of the samples is recorded in the full annealing and alloy tempered samples. Thus, for application requiring strength and ductility such as in aerospace industries, this tempered heat treated alloy could be used. In addition, the quenched sample shows a significant improvement in hardness.