AVS2018 Session RM-TuP: Reconfigurable Materials and Devices for Neuromorphic Computing Poster Session

DRAM and flash memory currently being used as working memory devices must be configured with transistors. For this reason, it has been reached the limits of scaling, power consumption and fabrication cost. In order to overcome these limits, next-generation memory devices have been developed and materials/device structures have been studied actively. Memristor could be used as a nonvolatile memory with simple crossbar array (CBA) structure. Although CBA structure is possible to innovatively overcome the scaling limits, it has major problem, so called sneak path current. It is caused by cross talking near the selected cell and typically solved by adding an additional selector device (e.g., diode, transistor, etc.). Recently, self-rectifying memristor could be enabled by bilayer stack, which could much simplifying the CBA structure: selector-less CBA. We fabricated the 10x10 and 30x30 CBA as selector-less memristor device using the potential barrier between each stack of the fabricated MIM structure.

In this study, we have acquired the self-rectifying characteristics for CBA structure using the Pt/HfO₂/Ti device. The device was fabricated 10x10 and 30x30 CBA patterned with 2 – 20 μm of electrode size. The top/bottom electrodes were deposited using electron beam evaporator and the dielectric material was deposited by atomic layer deposition (ALD). HfO₂ layer grown by ALD plays the role of switching layer in memristor. The thickness of the switching layer was quite thin, which eliminates the need for electroforming process. In addition, we obtained the self-rectifying characteristic that does not permit the fluent current conduction under negative bias through the potential barrier between Pt and HfO₂ layer.

As a result of electrical properties, this device follows an interface-type switching mechanism in which the current value decreased as the electrode size decreased. By inserting Al₂O₃ layer of 1 - 2nm, it was confirmed that switching occurs in HfO₂/Ti interface. The size of the formed conductive region was changed through the positive bias and the stability of the rectifying function was verified by applying the negative bias up to -3V. We confirmed the uniformity of memristor cells randomly chosen among 10x10 and 30x30 CBA and verified the device-to-device variability. Cycle-to-cycle variability was also obtained from these cells through a switching of more than 100 cycles. Finally, the AC measurement was applied to explore the possibility of fabricated device as a synaptic device.

Resistive switching devices (ReRAM) represent a broad class of two-terminal continuously tunable resistors including memristors, phase change memory (PCM), valence change memory (VCM), and electrochemical metallization cells (ECM). Though these devices, especially PCM, are increasingly being commercialized by industry for use in next generation memories, they are also all actively studied for use as synaptic weights in next generation hardware-accelerated neuromorphic networks.

We have previously investigated Electron Beam Induced Current Microscopy as a means of reliably characterizing resistive switches. In that investigation, we observed surprising electronic effects, such as internal secondary electron emission, in addition to more traditional electron-hole pair separation, and we broke those up into constituent currents based on their origin through Monte-Carlo modeling of the electron beam-matter interaction.

Now, armed with a new understanding of the physics of EBIC imaging, we study the impact of manufacturing variations on resistive switches by continuously tuning the thickness of an Al₂O₃ interfacial barrier. Shifts in the apparent ratios of internal secondary electron emission from the top electrode to the bottom electrode and vice versa appear to indicate a continuous tuning of the apparent filament diameter as both a function of the injected current and the interfacial barrier thickness. This yields an apparent reduction in the current density, the primary effect of which is a reduction in the device damage from forming and a suppression of parasitic leakage currents imaged in devices without interfacial barriers.

A major barrier to realizing neuromorphic hardware has been the development of analog memory with the programmability and impedance required for fully parallel computation and large scale integration. Existing resistive memory, i.e. phase change memory (PCM) and filament forming metal oxides (FFMO), suffer from non-linear programming that precludes parallel training operations. Furthermore, the devices are not capable of high impedance simultaneously with high accuracy and therefore suffer from circuit parasitics that limit parallel inference operations to less than 100x100 elements. Parallel operation of arrays larger than 1,000x1,000 elements is required for energy efficiency gains over CMOS.

To address these issues, ionic floating-gate memory (IFG) based upon ion-insertion electrodes and diffusive memristors was invented at Sandia National Laboratories. IFG is capable of fully parallel computation for both training and inference operations and can operate with both high accuracy and high impedance in order to realize arrays larger than 1,000x1,000 elements. Here, we demonstrate fully-parallel programming of prototype IFG arrays with vector-matrix multiplication (inference) and outer product update (training) operations. When scaled, IFG arrays are projected to operate with orders of magnitude lower energy consumption than PCM or FFMO and achieve ideal accuracy in neural networks. The key to IFG performance is the use of ion-insertion electrodes as a low-voltage, linearly programmable element[1, 2] and the use of a volatile, nano-electromechanical switch (diffusive memristor)[3] for array selectivity and cell retention. Here, I will discuss the physics and performance of these devices as well as the engineering and materials science challenges for fully integrating them into neuromorphic hardware.

[1] E. J. Fuller, F. E. Gabaly, F. Léonard, S. Agarwal, S. J. Plimpton, R. B. Jacobs-Gedrim, et al., "Li-Ion Synaptic Transistor for Low Power Analog Computing," Advanced Materials, 2017

[2] Y. van de Burgt, E. Lubberman, E. J. Fuller, S. T. Keene, G. C. Faria, S. Agarwal, et al., "A non-volatile organic electrochemical device as a low-voltage artificial synapse for neuromorphic computing," Nature Materials, 2017

[3] R. Midya, Z. Wang, J. Zhang, S. E. Savel'ev, C. Li, M. Rao, et al., "Anatomy of Ag/Hafnia‐Based Selectors with 1010 Nonlinearity," Advanced Materials, 2017