AVS2017 Session MS+AS-WeA: Advanced Surface, Interface, and Structural Characterization for High Volume Manufacturing

Wednesday, November 1, 2017 2:20 PM in Room 5 & 6

Wednesday Afternoon

Session Abstract Book
(279KB, May 6, 2020)
Time Period WeA Sessions | Abstract Timeline | Topic MS Sessions | Time Periods | Topics | AVS2017 Schedule

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2:20 PM MS+AS-WeA-1 The Cornell High Energy Synchrotron Source Upgrade: Current and Future Capabilities for Thin-film Research
Arthur Woll (Cornell University)

In early 2019, the Cornell High Energy Synchrotron Source (CHESS) will complete its most significant upgrade since its construction in 1980. CHESS was originally constructed as a dual-purpose machine, serving as both an x-ray source as well as a particle physics experiment. Since 2008, CHESS has operated as one of only five dedicated high energy synchrotron sources in the world, and one of only two in the U.S.. The upgrade will result in a dramatically improved source, will include six new undulator-fed experimental stations, and represents a unique opportunity to increase and improve access to hard x-ray synchrotron light.

CHESS’s history and mission emphasize the importance of deep collaboration with user communities to identify critical areas of instrumentation and methodological development. In particular CHESS has a long history of serving and advancing research on thin films and interfaces – in areas spanning both basic and applied research. CHESS currently hosts active user communities engaged in many of the most promising areas of thin-film research – including organic electronic thin films, high-K dielectrics and other complex oxides, dichalcogenides, and III-V nitrides. Particular research tools include ex-situ characterization such as grazing incidence small- and wide-angle scattering (GISAXS and GIWAXS), fast pole-figure analysis, automated x-ray reflectivity. Specialized equipment for in-situ measurements include chambers for in-situ thermal annealing and solvent annealing, and support for user-supplied UHV chambers for studying in situ thin-film growth and surface science. We will present several examples of recent user science as well as ongoing and proposed CHESS-based developments for thin-film research to motivate a discussion among the thin-film community of the most promising and critical areas for future capabilities of CHESS.

3:00 PM MS+AS-WeA-3 Using Synchrotron XRD Techniques to Impact Microelectronics Manufacturing Technologies
Jean Jordan-Sweet, Christian Lavoie (IBM T.J. Watson Research Center); Adra Carr (IBM Research, Albany, NY); Nicolas Breil (IBM SRDC, East Fishkill; now with Applied Materials Inc.); Martin Frank (IBM T.J. Watson Research Center)

Since the early 1980s IBM has maintained a strong effort in synchrotron-based research. While our involvement with these facilities has been multi-faceted, we have leveraged our impact through two main avenues: the development of unique instrumentation and the nurturing of mutually beneficial collaborations with academia.

I will present examples of how synchrotron-based XRD studies have impacted our heavily materials- and process-centric technologies, preceded by a description of the instrumentation and techniques that were developed and applied in these examples. Much of our success in supporting IBM technology has been based on the use of in-situ XRD, electrical resistance, and optical light scattering measurements during the rapid thermal annealing of thin films or arrays of features. This instrumentation was developed at the NSLS (Brookhaven National Laboratory) [1], and has been redesigned, automated and recently installed at the Canadian Light Source. A second technique that is crucial for understanding the microstructure of thin polycrystalline films on single-crystal substrates is the measurement of texture. With the use of a linear or area detector, many high-resolution pole figures covering a large range of d-spacing can be obtained simultaneously [2]. Understanding and controlling film texture is critical to controlling phase transformations in thin films and to stabilizing and enhancing thermal processing windows during device manufacturing [3].

The first example is a long-term effort to understand the effects of materials and processing on the formation of low-resistance contacts to the gate, source and drain of CMOS devices. It has spanned three materials sets and many generations of chips. The culmination of this knowledge lies in a valuable database containing structure, roughness and resistance information from many thousands of anneals on key samples. With these measurements, IBM was able to extend the manufacturing lifetime of C54-TiSi2, stabilize the NiSi process, and recently resolve a Ni “fang” defect [4] related to the IBM Power8® processor. The second example illustrates how the same techniques are helping us develop advanced memory devices based on ferroelectric hafnium oxide, which are intended to be used for neuromorphic computing.

1] G.B. Stephenson et al., Rev. Sci. Instrum. 60, 1537, 1989; L.A. Clevenger et al., J. Mater. Res. 10, 2355 (1995); J.L. Jordan-Sweet, IBM J. Res. Develop. 44, 457 (2000).

2] S. Gaudet et al., J. Vac. Sci. Technol. A 31(2), 021505 (2013).

3] B. DeSchutter et al., Appl. Phys. Rev. 3, 031302, 2016; C. Lavoie et al., ECS Transactions (accepted).

4] N. Breil et al., Microelectron. Eng. 137, 79 (2015).

3:40 PM BREAK
4:20 PM MS+AS-WeA-7 Development of Ultra-thin ALD Grown high-k Dielectrics and Interconnect Diffusion Barrier Layers aided by Advanced X-ray Structural Analysis for sub 10nm Nodes
Steven Consiglio, Kandabara Tapily, Robert Clark, Cory S. Wajda, Kai-Hung Yu, Takahiro Hakamata, Gert J. Leusink (TEL Technology Center, America, LLC); Sonal Dey, Alain C. Diebold (Colleges of Nanoscale Science and Engineering, SUNY Polytechnic Institute)

As the semiconductor industry develops processes and integration schemes for the 10nm technology node and beyond, conventional scaling of existing materials is no longer sufficient to enable further device scaling. New materials in the form of ultra-thin films need to be introduced and evaluated at an ever-increasing pace and conventional inline wafer metrology systems do not offer the needed flexibility and capabilities to probe the physical/chemical/structural properties of such extremely scaled layers of increasing complexity.

In this regard, we have investigated the properties of ultra-thin high-k dielectrics and interconnect (both Cu and Ru) diffusion barriers using advanced synchrotron X-ray structural analysis. Some key examples will be illustrated including analysis of higher-k phase stabilization and texturing in thin dielectrics on Si and high mobility substrates, ferroelectric phase stabilization for negative differential capacitance dielectrics, and the evaluation of diffusion barrier performance by using an in-situ ramp anneal method for both Cu and Ru which is a potential Cu interconnect replacement metal.

References:

S. Consiglio et al., J. Electrochem. Soc., 159(6), G80-G88 (2012).

K. Tapily et al., ECS Trans., 45(3), 411-420 (2012).

R. Vasić et al., J. Appl. Phys., 113, 234101 (2013).

S. Consiglio et al., J. Vac. Sci. Technol. B, 32(3), 03D122 (2014).

K. Tapily et al., ECS J. Solid State Sci. Technol., 4(2), N1-N5 (2015).

S. Consiglio et al., ECS J. Solid State Sci. Technol., 5(9), P509-P513 ( 2016).

S. Dey et al., J. Appl. Phys., 120, 125304 (2016).

S. Dey et al., J. Vac. Sci. Technol. A, 35(3), 03E109 (2017).

5:00 PM MS+AS-WeA-9 Stress Control of rf Sputter Deposition of Piezoelectric Sc0.12Al0.88N
Michael Henry, Robert Timon, Travis Young, Erica Douglas, Benjamin Griffin (Sandia National Laboratories)

Substitution of Al by Sc has been predicted and demonstrated to improve the piezoelectric response with applications in radio frequency (RF) filter technologies. Although cosputtering has achieved Sc incorporation in excess of 20%, industrial processes require single target sputtering and is currently limited. However, the major concern with sputter deposition of ScAl is the control over growth of inclusions while simultaneously controlling film stress for suspended MEMS structures. Our work on 12% Sc suggests, with a direct relationship between the inclusion occurrences and compressive film stress, deposition control can suppress the inclusion growth by increasing the compressive stress. Too much compressive stress can prevent suspension of MEMS devices due to Euler buckling.

This work will describe the RF sputtering deposition and major parameter control over the deposition of Sc0.12Al0.88N. We will continue to show a multistep deposition which begins with a process of high compressive stress suppressing the inclusions and then drive the film back towards lower compressive stress levels such that an inclusion free low compressive stress film is deposited such that suspended resonators can be formed. To detail piezoelectric film properties, both top metal and top/bottom metal resonators are demonstrated from 500 MHz to 2 GHz.

Session Abstract Book
(279KB, May 6, 2020)
Time Period WeA Sessions | Abstract Timeline | Topic MS Sessions | Time Periods | Topics | AVS2017 Schedule