The rapid scaling of semiconductor memory is radically changing the memory industry. Flash memory has switched from lateral scaling to vertical scaling while other new memory technologies are aggressively vying for new opportunities in the memory market. Their targets range from niche applications to replacing any one of the three big memory technologies : SRAM, DRAM or Flash.

For vertical NAND flash largely conventional materials are used in its fabrication at present. However, the unabated drive for higher density is driving agressive vertical scaling, which poses new problems for stack design and processing. This drives improvements and maybe even changes in the materials.

Newer memory technologies, such as STT-RAM, ReRAM and PCRAM, bring with them different challenges to the processing arena. These new memories come with materials whose full scope of interactions with semiconductor processing are still poorly understood. These materials provide new challenges for the processing tools when scaling these memory technologies to dimensions that are economically attractive.

In this talk we will review some of the more challenging problems for advanced memories and some potential solutions.

As we face a situation in the next decade where further scaling of traditional CMOS based devices would not be cost effective from manufacturing issues such as superfine lithography/etching and device physics barriers. Thus non-traditional new materials and devices research have been instigated, which resulted in new principle based non-volatile memories. A short list of such newly emerging memory consists of resistance change memory ReRAM, phase change memory, PCRAM, spin based MRAM/STT RAM, depending upon desirable characteristics to implement.

Though resistance change phenomena in metal oxides have been recognized since early days, it is in the past few years when aggressive research for application as nonvolatile memory has taken off. Basic switching mechanism is formation and annihilation of conductive vacancy chain in the metal oxide sandwiched by two electrodes. Both atomistic and macroscopic models have been investigated. Role of electrode materials and switching oxide interfaces during memory operation have attracted strong attention, as it would imply not only memory characteristics but also device endurance and scalability. Further, development of this type of resistance change memory is toward vertical integration with multi-memory layers which could replace ultra-high density flash memory.

Resistive Random Access Memory concept is probably close to production in a new generation of non-volatile memories, but there are still some reliability issues to be fully understood. Resistive RAM devices can be scaled down below 10 nm [1], meaning that the discrete nature of atomic structure of the materials may already be observed in device operation properties. Material-wise, the transition metal oxides attracted the scientific interest due to their CMOS compatibility and their ability to operate on intrinsic defects (oxygen vacancies). For RRAM working with extrinsic defects like metallic inclusions called Conductive Bridge RAM (CBRAM), a larger spectrum of solid electrolytes can be used. Using Density Functional Theory simulations of RRAM materials, we evaluated the kinetics of the defects migration of the conducting species to show that atomic disorder of amorphous state can exhibit large variability in terms of defect stability and kinetic barriers.[2] These have a great impact on filament resistance evolution in time, which can be observed during forming step of the resistive filament, but not only. In the short time immediately after filament formation, the atomic configuration can relax to a metastable state, therefore changing the resistivity of the filament. In a long time retention of the filament resistance we can still measure resistance change. All these observations can be explained with the computed statistical distributions of the defect stability and kinetic barriers in the RRAM materials.

[1] B. Govoreanu et al., Ext.Abstr. SSDM Conf.,Nagoya, Japan, 1005 (2011)

[2] S. Clima et al., Electron Device Lett , 769 (2015)

Many Type 1 RRAM cells can be formed under neutron irradiation and end up in the LRS. On the other hand, unformed neutron-irradiated Type 1 RRAM cells only require a lower voltage to form. In addition, the resistance of the HRS increased on the Type 1 RRAM cell. The shift in values of the set voltage can be seen on the I-V characteristic of the neutron-irradiated Type 1 RRAM cell. A similar increase in the resistance of HRS is also observed in proton-irradiated Type 1 RRAM cells. The shift in values of the set voltage can be seen on the I-V characteristic of the proton-irradiated Type 1 RRAM cell.

There are no obvious changes to Type 2 RRAM cells after either neutron or proton irradiation. It is very likely that both the changes in thickness and fabrication are very important since these two modifications can cut down on the number of defects which affect the switching mechanism of the RRAM cell.

This work was supported by the Semiconductor Research Corporation under Contract No. 2012-KJ-2359, by the National Science Foundation under Grant No. CBET-1066231.

[1] H.-S. Philip Wong, H-Y Lee, S. Yu, Y. S. Chen, Y. Wu, P-S Chen, B. Lee, F. T. Chen, and M-J Tsai, “Metal–oxide RRAM,” Proceedings of the IEEE 100 1951 (2012).

Fastest growth has been registered in the field of electronics. It is the only field which has transformed every corner of the society and every age of the civic society, from youngest child to elderly persons. The growth was outcome of the miniaturization of the basic active device in electronics. The journey started from few millimeter size around 1965 and now reached to few tense of nanometers. At the beginning of this journey, the new smaller size devices not only performed better to its predecessor but were cost effective also. As we reached below ~300nm, the production was no longer economic. At around few tense of nanometer size the device performance also affected and at this junction the need was felt to explore alternate working principles for the device to maintain growth of the field and continue to benefit the society. New devices such as SET, RTD, resistive memory, magnetic memory, spintronic etc. were studied. Working device size of less than ten nanometers is expected from this new class of devices. Here we report fabrication of titanium oxide based resistive memory device by solgel technique. Thin films of high quality doped and undoped titanium oxide were applied on cleaned FTO or Pt-FTO glass substrates by solgel dip process. We doped titanium oxide with aliovalent cations by suitable choice of doped cation salt. Sequence of undoped and doped layers of titanium oxide was altered in different devices. Final structure was completed by thermal evaporation of metal electrode for electrical connection.

A resistance change of 2-3 orders of magnitude was observed up to the maximum applied potential of ±3.0 volts. The resistance change has complex dependence on nature of the dopant, dopant concentration, electrode material and sequence of the doped and undoped layers. We tried to explore the resistance change behavior and remembrance of resistance on the basis of basic studies viz; XRD, XPS, SEM, etc. cyclic voltameteric studies were also carried out to understand the contact between electrode and TiO₂ layer.