AVS2004 Session DI+PS-ThA: Oxides on Semiconductors
Thursday, November 18, 2004 3:40 PM in Room 304B
Thursday Afternoon
Time Period ThA Sessions | Abstract Timeline | Topic DI Sessions | Time Periods | Topics | AVS2004 Schedule
Start | Invited? | Item |
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3:40 PM | Invited |
DI+PS-ThA-6 Crystalline Oxides on Semiconductors, from Interface Structure to Electrical Properties
F.J. Walker (University of Tennessee); C.A. Billman (Penn State University); M. Buongiorno-Nardelli (North Carolina State University); R.A. McKee (Oak Ridge National Laboratory) From the point of view of synthesis using molecular beam epitaxy (MBE) and understanding using tools developed from first principle theory like density functional theory (DFT), a metal oxide semiconductor (MOS) device can be described as an epitaxial superlattice where each atomic layer is well-defined. This view is becoming increasingly germane to device physics as dimensions are scaled down to the atomic level. In this paper we discuss the fundamental interplay of the physical structure, as determined by reflection high energy electron diffraction (RHEED), and the electrical properties, as determined by frequency-dependent electrical impedance measurements and x-ray photoelectron spectroscopy (XPS), for the crystalline oxide on semiconductor system. We show that an interface phase is particularly important to structure and electrical properties for alkaline earth oxides grown on silicon and germanium. The interface phase begins as a surface phase of strontium silicide and transforms to an interface phase through a structural transition. The final structure and composition of the interface phase determines the band offset, interface state density and serves as a template for the epitaxial growth of the alkaline earth oxides. Office of Basic Energy Sciences, U.S. Department of Energy at Oak Ridge National Laboratory under contract DE-AC05-00OR22725 with UT-Battelle, LLC and at the University of Tennesssee under contract DE-FG02-01ER45937. |
4:20 PM |
DI+PS-ThA-8 Ultra Thin Oxides and Nitrides on Si: Growth and Properties
P. Morgen, U. Robenhagen, A. Bahari (SDU Odense, Denmark); M.G. Rao (IISc, India); K. Pedersen (Aalborg University, Denmark) Various conditions for slow growth of ultra thin silicon oxides on Si have been studied, at relatively low temperatures and pressures, in an ultra high vacuum environment. In this way a hitherto unknown regime in pressure-temperature space has been discovered including a fast (ballistic) stage terminating with a self-limiting oxidation. This precedes and deviates radically from the high temperature-high pressure Deal-Grove mechanism. Several different schemes are invented leading to oxide thicknesses from about 0.4 to 0.7 nm, with high quality of the interface and uniformity of coverage. Our present and previous studies connect the initial steps of oxygen adsorption and reaction at room temperature with the first steps (and barriers) to form three dimensional oxides on two Si surfaces (111) and (100). The structural information is obtained by following these oxidation reactions with photoemission spectroscopy, including high resolution, surface sensitive core-level photoemission; STM; LEED; optical second harmonic generation spectroscopy, and Auger electron spectroscopy. Similar procedures are followed to create ultra thin nitrides using microwave dissociated nitrogen. This process is already known to be self limiting, but at a somewhat higher film thickness than for the growth of oxides. The prospect of doping these oxides with nitrogen, and these nitrides with oxygen, is also successfully explored. |
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4:40 PM |
DI+PS-ThA-9 Preparation and Properties of Clean Si3N4 Surfaces
V.M. Bermudez, F.K. Perkins (Naval Research Laboratory) Si3N4 is an important material for use in electronic devices. Thin films of Si3N4 are used as passivation layers and diffusion barriers in IC's and as protective coatings in disk drives. However, the basic surface science of Si3N4 films has been impeded by the difficulty in obtaining a clean and undamaged surface. In this work, in-situ chemical methods for preparing atomically clean surfaces of Si3N4 thin films in UHV have been studied using XPS, UPS, ELS and AES. Prior to UHV studies, the thin films (grown ex situ on Si(100) by LPCVD) were characterized by IR reflection-absorption spectroscopy which showed them to be stoichiometric with a low H content. A two-step process consisting of annealing in a flux of NH3 vapor to remove C and vapor deposition of Si (followed by thermal desorption) to remove O is found to be an effective cleaning procedure. Other potential cleaning methods, such as annealing in UHV without in- situ chemical treatment or annealing in a flux of H atoms, were considered and found to be only partly effective. The clean surfaces are disordered, as seen in LEED, but show no evidence of Si-Si bonding (which would indicate N vacancies) in the Si LVV AES or in surface-sensitive Si 2p XPS. Evidence for surface- related features is seen in the N 1s XPS and in ELS data in the region of valence excitations; however, no indication of occupied surface states near the valence band maximum is seen in UPS. Preliminary results for O2 chemisorption show adsorbate- induced features in the band gap and also evidence for a reduction in the negative surface potential due to electron traps present on the clean surface. |
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5:00 PM |
DI+PS-ThA-10 STM, STS, and DFT Studies of SiO Deposition on the Ge(100) Surface
T.J. Grassman, J.Z. Sexton, A.C. Kummel (University of California, San Diego) To further the development of a germanium-based metal-oxide-semiconductor field effect transistor (MOSFET) a suitable gate-oxide material must be found which yields a high-quality, electrically-unpinned interface. For this, the semiconductor/oxide interface needs to be free of charge traps and other such interfacial defects that can cause Fermi-level pinning. High defect densities reduce the capacitance of the MOS structure and prevent the modulation of the semiconductor valence and conduction bands via the application of a gate bias. Germanium's intrinsic oxide has been shown to be inadequate for the task of providing a clean interface, therefore an alternative material must be used which can be deposited and grown on the Ge surface. To this end, we are investigating the bonding and electronic structure of the interface between SiO and the Ge(100)-p(2x1) surface using scanning tunneling microscopy (STM), scanning tunneling spectroscopy (STS), and density functional theory (DFT) computational modeling. SiO can act as a precursor to SiO2 or as a buffer layer for high-k dielectric growth. We will present atomically resolved images of both the clean Ge(100) and SiO-deposited surfaces at various coverages, along with DFT modeling results of the observed bonding structures. We find that SiO always bonds Si-end down, mostly inserting in between the Ge dimer rows and sometimes into the Ge dimers themselves. Even at modest coverages (> 5%) SiO bilayers are formed via pyramidal (SiO)3 molecular structures with Si-O-Si-O bonding configuration. DFT-based STM simulations will be presented to aid in the interpretation of experimental STM images. We will also present STS dI/dV spectra of the associated surface electronic structure (density of states) which show that the SiO/Ge interface yields an unpinned Fermi level. |