High-k Oxides for MOSFETs and Memory Devices II/Oxides and Dielectrics for Novel Devices and Ultra-dense Memory I

Tuesday, October 29, 2013 2:00 PM in Room 101 B

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2:00 PM EM+MI+NS+SS+TF-TuA-1 Metal-Atom Dimer Model of Oxygen Vacancy Behaviour in Oxide RRAM
John Robertson (Cambridge University, UK)

Resistive random access memories (RRAM)have great potential as future non-volatile memories with a faster read and write time than Flash memory. RRAM works by the forming of a conductive filament across a resistive film between the electrodes, which is then SET and RESET between its conductive and resistive states [1-2]. Typical films are oxides such as TiO2 , Ta2O5 and HfO2,and the conductive filament is believed to consistent of a percolation path of oxygen vacancies. Recently there have been various models of this oxygen vacancy path, in terms of molecular dynamics [3], or ordered vacancy structures [4]. Here we use an ordered model of vacancies in HfO2 or TiO2, as in a local M2O3 structure in the MO2 matrix. In Ti2O3, the Ti atoms form an ordered line of Ti-Ti dimers along the c axis, and the bonding state stabilises the Ti3+ state along the path. The transition between the ordered and disordered phase of dimers describes the low to high resistivity state of RRAM, as in the metal-insulator transition in Ti2O3.

1 R Waser et al, Adv Mater 21 2632 (2009)

2 G Bersuker, SISC (2012)

3 S Clima et al, App Phys Lett 100 133102 (2012)

4 K Kamiya, M Yang, S Park, B M Kope, Y Nishi, M Niwa, K Shiraishi, App Phys Lett 100 073502 (2012)

2:20 PM EM+MI+NS+SS+TF-TuA-2 Investigation of Sub-Gap Defect States in High-k Dielectric Materials Using Reflection Electron Energy Loss Spectroscopy
Benjamin French, Sean King (Intel Corporation)
The electrical reliability of high-k metal gate transistors is a growing concern as the nano-electronics industry moves to sub-12 nm dimensions and new 3D multi gate transistor technologies. In order to understand the various possible reliability failure mechanisms in high-k dielectric devices, knowledge of the band gap and defect states in high-k dielectrics is needed, but experimental identification of both the chemical identity and energy level of the defects contributing to reliability issues in high-k materials has gone largely unreported in many cases. In this regard, we have utilized Reflection Electron Energy Loss Spectroscopy (REELS) to determine the band gap of numerous single crystalline and amorphous high-k dielectric materials. We demonstrate that for standard single crystalline materials such as Quartz, Al2O3, and TiO2 REELS band gap measurements agree with known values. For amorphous high-k thin film materials, we further demonstrate that REELS band gap measurements in most cases agree with optical measurements of the same materials. However, in some cases, we have observed that REELS analysis is complicated by the existence of defect states within the band gap of these materials. While troublesome for band gap measurements, we demonstrate that this sensitivity can be utilized to determine the energy level of various defects in pristine and sputter damaged high-k dielectrics and in some cases the chemical identity of the defect can be determined.
2:40 PM EM+MI+NS+SS+TF-TuA-3 Atomistic Mechanism of RRAM Operations
Gennadi Bersuker (SEMATECH)
Non-volatile resistive switching memory (RRAM) technology shows a promise to overcome the scaling limit approached by the conventional electron storage memories. Among a variety of RRAM systems, the HfO2-based technology is especially attractive due to its fab-friendly fabrication process, high endurance and retention, and sub-nanosecond switching-speed assuming that low-current, low-variability operations can be achieved. This study aims to identify critical features of the material structure and operation conditions controlling the inherently stochastic switching process. The forming of the initial conductive filament in hafnia and its subsequent disruption/restoration responsible for the switching between high and low resistive states are modeled considering oxygen vacancies/ions generation and recombination and oxygen ion diffusion in the surrounding oxide driven by the local temperature and electric field. The simulations reveal the main structural characteristics of the dielectric stack affecting variability and allow assessing the effect of different forming conditions on the overall filament geometry/composition, thus, providing general guidelines for optimizing device operations.
4:00 PM EM+MI+NS+SS+TF-TuA-7 Bipolar Selector Devices for Cross-point ReRAM
HyunSang Hwang (POSTECH, Republic of Korea)

ReRAM has been considered as a promising candidate to overcome scaling limits of the conventional FLASH memory due to its superior performance. To realize the high density memory, 3D cross-point array or Vertical ReRAM are necessary [1]. To integrate cross-point (4F2) ReRAM device array, we need to develop bi-directional selector device to suppress the sneak current path through the unselected devices. Although various candidates with selector properties were recently reported, several problems such as insufficient current density at set/reset operations for nano-scale devices, low selectivity, and poor endurance have been raised. In this talk, two different types of selector device for cross-point ReRAM are introduced.

A. Threshold switching device

Various reports on threshold switching device with oxides of V, Nb, and Ti have been reported. This threshold switching is attributed to formation of a metallic phase as a result of local Joule heating induced metal-insulator transition (MIT) of the corresponding suboxides such as VO2, NbO2, and Ti2O3. Among them, we investigated threshold switching characteristics of NbO2 [2]. Ultrathin NbO2 layer (< 10nm) exhibits excellent threshold switching characteristics. Especially, thermal stability of threshold switching was obtained at a high temperature. Threshold switching property remains stable up to 433K, which is much higher than VO2 material (only a 340K). Furthermore, we demonstrate hybrid memory characteristic, which exhibits both threshold and memory switching, by controlling the oxygen concentration of NbOx layer.

B. Multi-layered oxide based device

Highly non-linear property of Ta2O5/TaOx/TiO2 structure was reported [3]. By using multi-layered oxide stack, a high current density of 107A/cm2 and a high selectivity (~104) were achieved. To maximize the selector performance, we have performed extensive tunnel barrier engineering such as the adoption of various materials and control of oxidation conditions to optimize the oxide stoichiometry, film thickness, and electrode material. Furthermore, in order to confirm the feasibility for cross-point array application, selector device was vertically-integrated with ReRAM.

We have demonstrated excellent selector characteristics of threshold switching device and multi-layered tunneling oxide based device. Superior performances of selector devices show good promise for future high density ReRAM applications.


1. D. Kau et al., IEDM, 27.1, pp. 617-620, 2009.

2. S. Kim et al., VLSI, T18-3, pp. 155-156, 2012.

3. W. Lee et al., VLSI, T5-2, pp. 37-38, 2012.

4:40 PM EM+MI+NS+SS+TF-TuA-9 Crystallization study of SrTiO3 Thin Films Prepared on Si3N4, Al2O3 and Pt surfaces by Plasma-Assisted ALD
Valentino Longo, Marcel Verheijen, Fred Roozeboom, Erwin Kessels (Eindhoven University of Technology, Netherlands)

SrTiO3 (STO) has received much attention due to its favorable properties as ferro-electric, para-electric and high-k dielectric material, related to its crystalline perovskite structure. Thin STO films are to be employed as the dielectric layer in metal-insulator-metal (MIM) structures, for example for DRAM and/or RRAM applications. When deposited by Atomic Layer Deposition (ALD), STO films are amorphous and require an annealing step to crystallize. Recent reports have shown that Sr-rich films yield a finer crystalline structure than stoichiometric films upon crystallization by rapid thermal annealing (RTA). The finer grain structure results in reduced nanocrack formation, thus less leakage and improved dielectric properties. A deeper understanding of the crystallization behavior of STO is therefore of crucial importance to further optimize the film properties.

In this work SrTiO3 thin films with different compositions ([Sr]/[Sr]+[Ti] from 0.50 to 0.65) were deposited by plasma-assisted ALD employing cyclopentadienyl-based precursors and an O2 plasma. The crystallization of the as-deposited amorphous films was obtained by RTA in N2 at temperatures ranging from 550 °C to 650 °C. Different annealing times (60 to 600 s) were employed to characterize the crystallization process at different stages. An in-depth analysis of the microstructure of the crystallized STO was carried out by transmission electron microscopy (TEM). As a first step, the analysis was performed on STO films deposited on Si3N4 TEM membranes, either bare or coated by ALD-grown Al2O3, due to the transparency of these materials to the electron beam. It was shown that the STO crystallites had grown in a transrotational manner and that an increased Sr-content resulted in films with reduced grain size and a more compact microstructure. Furthermore, two crystallization regimes were identified: 1) growth-dominated, where the crystallization process is dominated by growth of a low density of crystals, and 2) nucleation-dominated, where a high density of crystals is limited in lateral growth by their proximity. Finally, the STO films were also deposited on Pt-coated TEM windows (Pt prepared by plasma-assisted ALD) to compare the crystallization kinetics on a representative functional bottom electrode material as used in MIM structures. The TEM analysis and the X-ray diffraction patterns evidenced that these films show quite similar crystallization behavior as on Si3N4 and Al2O3 surfaces.

5:00 PM EM+MI+NS+SS+TF-TuA-10 Superconformal Coating and Filling by Two-molecule CVD
Wenjiao Wang, Noel Chang, Tracey Hitt, Gregory Girolami, John Abelson (University of Illinois at Urbana Champaign)

An important fabrication challenge is to fill deep trenches or gaps with a dielectric material, such as shallow trench isolation or inter-metal dielectric in microelectronics. This is typically accomplished using chemical vapor deposition, which affords nearly conformal film growth, interspersed with one or more etching steps to prevent pinch-off of the feature opening. A superior alternative would be superconformal growth, in which the film thickness is inherently thicker towards the bottom of a deep feature than at the top, to afford complete filling in a single process.

We report a method, applicable to CVD processes that use two reactive molecules, to afford superconformal growth. It takes advantage of two insights. First, growth involves competitive adsorption on the film surface, such that the growth rate is maximum for a particular ratio of reactant fluxes (pressures) and falls on either side of this peak. Thus, there exists a regime in which decreasing the pressure of one reactant will increase the film growth rate. Second, the molecular (Knudsen) diffusion coefficient controls the rate of pressure drop down the axis of the feature. The reactant with the smaller diffusion coefficient (generally, the heavier molecule) will decrease in pressure faster than the other component. Combining these insights, we identify regimes of reactant pressure that afford superconformal growth in deep features.

We demonstrate superconformal growth, to a maximum depth beyond which the reactants are depleted, for two CVD systems. MgO is deposited at 220°C using the precursor Mg(DMADB)2 with H2O as the co-reactant; the growth rate increases from 1.0 nm/min at the trench opening to 1.8 nm/min at a depth/width ratio of 18. TiO2 is deposited at 300°C using TiCl4 and H2O; the growth rate increases from 1.5 to 4.0 nm/min at depth/width ratio of 5. The TiO2 coating inside trench is found to be stoichiometric and 88% of bulk density.

Finally, we describe a general model for the superconformal growth phenomenon. It uses as input the adsorption and reaction rate coefficients derived from growth on planar substrates, and suitable values for the molecular diffusivities. A first-order solution of the diffusion-reaction equation affords an analytic relationship that predicts the degree of superconformality in terms of the aspect ratio of the feature and the starting pressures of the reactants. It can be used to identify the regimes of useful operation and the necessary growth conditions. Given input data on reaction rates, this model can be used to predict which other two-molecule CVD systems would afford superconformal growth.
5:20 PM EM+MI+NS+SS+TF-TuA-11 Resistive Switching Random Access Memory (RRAM) - Materials, Device, Scaling, and Array Design
Yi Wu, Shimeng Yu, Hong-Yu Chen, Jiale Liang, Zizhen Jiang, H.-S. Philip Wong (Stanford University)
In this paper, we review our recent progress on resistive switching metal oxide memory (RRAM). We continue to explore the stochastic nature of resistive switching in metal oxide RRAM using the Kinetic Monte Carlo method. By including multiple conduction mechanisms, local field and local temperature profile, we substantially improved our stochastic model and studied the RRAM characteristics such as set/forming current overshoot, endurance and retention [1-3]. From an experimental perspective, we have demonstrated that HfOx-based RRAM devices can scale down to less than 10 nm diameter using electron beam lithography (e-beam) and atomic layered deposition (ALD) methods. The devices can switch more 108 cycles with fast speed (~10 ns), large resistance window (~100X), multi-level storage capabilities, and good retention. We also characterized the scaling behavior of the HfOx-based devices such as forming, set/reset voltages [4]. Two-layer stacked HfOx vertical RRAM was fabricated for 3D cross-point architecture. The vertical RRAM devices show excellent performance such as low reset current (<50 uA), fast switching (~50 ns), good endurance (~108 cycles), half-selected immunity (~108 cycles), retention (>105 s @125oC) [5]. Looking into the future, we investigated the impact of wordline/bitline metal wire scaling on the read/write performance, energy consumption, speed and reliability in the cross-point memory array architecture. Possible solutions were suggested to incorporate and mitigate the scaling effects of metal wire interconnect for the next-generation non-volatile memory (NVM) [6-7].

[1] X. Guan, S. Yu, H. -S. P. Wong, IEEE Trans. Electron Devices, vol. 59, no. 4, pp. 1172-1182, 2012

[2] S. Yu, X. Guan, H. -S. P. Wong, IEEE Trans. Electron Devices, vol. 59 no. 4, pp. 1183-1189, 2012

[3] S. Yu, X. Guan, and H. -S. P. Wong, International Electron Devices Meeting (IEDM), pp. 585-588, 2012

[4] Z. Zhang, Y. Wu, H.-S.P. Wong, and S. Wong, IEEE Electron Devices Letters, submitted

[5] H.-Y. Chen, S. Yu, B. Gao, P. Huang, J. F. Kang, and H.-S. P. Wong, International Electron Devices Meeting (IEDM), pp. 497-500, 2012

[6] J. Liang, S. Yeh, S.S. Wong, H. -S. P. Wong, ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 9, No. 1, Article 9, pp. 9:1 – 9:14, 2013