Thru silicon via (TSV) etch process for deep and high-aspect ratio structure has been studied thoroughly for applications such as MEMS and CMOS devices. Recently, TSV used in 3D-LSI devices for logic devices may be a few microns in diameter and about 50 um deep. On the other hand, TSVs used in stacking memory devices, the via diameter and depth would be several tens of microns. Therefore, development of TSV etching process is very important for realizing these applications. In this study, a large via size etching in a high-pressure process was focused by using very high frequency capacitive coupled plasma (VHF –CCP) with an ultra self-confined system. This plasma system is simple parallel plate CCP about 100Pa or more process. High-pressure process was carried out on the plasma confined, because mean free pass is very short. And, ion energy distribution (IED) is also controllable by high-presser process with VHF bias. The bimodal IED changes under high-pressure. The peak of high-energy side is reduced, and a charge exchange peak appears. It is considered that the charge exchange is important to anisotropic Si etching of large size TSV with VHF bias.

The explosion of MEMS in automotive and cell phone markets has been enabled by low cost wafer level packaging (WLP) technology that provides a robust and hermetic enclosure for an otherwise delicate device. The more obvious advantage of WLP is greatly improved reliability, because the device is protected from organic and particulate contaminants while in the hands of the end user. A less obvious advantage is the protection provided by WLP during the manufacturing process, which often produces the highest levels of stress that a MEMS device experiences. These processes include wafer grinding, wafer dicing, and chip solder re-flow attachment to circuit boards and other chips. Firstly in this talk, wafer level packaging technologies will be outlined, focusing on the truly hermetic methods -- alloy, glass frit, Au-Au thermo-compression, anodic, and fusion bonding. Secondly the integration of Through Silicon Vias (TSV) with WLP will be discussed. Finally the performance of these technologies will be compared from a manufacturing perspective, including yield and thermal budget.

Dry etching of magnetic thin films is a crucial step in micro fabrication of magnetic random access memories (MARMs) and read/write heads for magnetic data storages. Argon (Ar) ion milling seems to be almost the only etching technique available in the current manufacturing processes. However Ar ion milling is incapable of achieving anisotropic and selective etching of magnetic films (Ni, Co etc.) over hardmasks (Ta etc.) and therefore highly selective reactive ion etching (RIE) of magnetic thin films is a highly sought-after technology. RIE processes based on CO/NH₃ or CH₃OH is a candidate for selective etching of magnetic thin films. In this study, we have examined etching processes of Ni, Co and Ta thin films by energetic CO⁺, O⁺ or OH⁺ ions, which are considered to be major etchants of CO/NH₃ or CH₃OH plasmas. We have determined the etching yields and analyzed surface reactions, using a mass-selected ion beam system. The ion beam system is designed to inject mono-energetic single-species ions into a sample surface in ultra-high vacuum conditions. The reaction chamber, where the sample is placed, is equipped with an X-ray photoelectron spectroscopy (XPS) for in-situ chemical analyses of irradiated surfaces. The ion beam energy used in this study is in the range of 150-1000 eV. The etching yields are determined from measured depth profiles of irradiated surfaces and ion fluxes. The etching yields of Ni and Co by CO⁺ ions are higher than that by O⁺ ions but lower than the yields of possible physical sputtering, which are estimated from interpolation of sputtering yield data of inert atom ions (He⁺, Ne⁺, Ar⁺, Kr⁺ etc.). From XPS analysis for O⁺ irradiated Ni and Co surfaces, oxidation is found to occur under O⁺ irradiation, which suggests that the oxide layer hinders sputtering by ion bombardment. It is found that little oxidation occurs on Ni or Co surfaces under CO⁺ ion irradiation and etching by CO⁺ ion bombardments proceeds. On a Ta surface, on the other hand, in the both cases of O⁺ and CO⁺ irradiations, oxidation occurs and its etching yield is far smaller than the yield of its possible physical sputtering. Therefore we have found that high selectivity of Ni and Co etching against hard masks (Ta, TaN) arises from the prevention of sputtering by mask oxidation. Etching characteristics by OH⁺ irradiation were also studied in a similar manner. This work was supported by the Semiconductor Technology Academic Research Center (STARC).