AVS2001 Session DI1-MoP: High K Dielectrics Poster Session

Monday, October 29, 2001 5:30 PM in Room 134/135

Monday Afternoon

Time Period MoP Sessions | Topic DI Sessions | Time Periods | Topics | AVS2001 Schedule

DI1-MoP-1 Generation and Relaxation of Positive Charge in Gate Dielectric of MOS Structures at High-fields
G.G. Bondarenko (Moscow Institute of Electronics and Mathematics, Russia); V.V. Andreev, A.A. Stolyarov (Bauman Moscow State Technical University, Russia)
In this work the new technique of investigation of generation and relaxation processes in gate dielectric of MOS structures during and after high-field stress is proposed. The technique is based on the controlling of current stress, applied to the sample, and simultaneous voltage measurement on it. The technique proposed allows carrying out the controlled electron injection into gate dielectric at high-fields, realizing the simultaneous monitoring of MOS structures charge state change both under the present field and under lower fields, that gives possibility to obtain new quality information about charge generation processes in dielectric layers. The technique allows, right after high-field injection without sample re-switching, to monitor the relaxation processes of charges generated by injected electrons in gate dielectric of MOS structures in wide range of electric fields, from the injection field to the structure short circuit. Using the technique proposed the investigation of positive charge generation and relaxation phenomena in silicon MOS structures with thermal SiO2 film had been carried out. It was shown that under high injection current densities, the positive charge value monitoring by voltage shift on MOS structure can lead to significant error, to decrease which it is necessary to measure the positive charge value using voltage shift under less current densities. It was found out that the relaxation time of positive charge, generated by tunnel Fowler-Nordheim electron injection from silicon in thermal SiO2 film, has field dependence, decreasing with external electric field rise.
DI1-MoP-2 Stability of Chemical Vapor Deposited Thin Films HFO2 and HFSixOy
H. Bhandari, V. Rangarajan, T.M. Klein (University of Alabama)
Two desirable properties for candidate high dielectric constant materials for MOSFET gates are that the material remains amorphous and does not react with silicon substrate during post deposition anneals. Uncontrolled multiple oxide layer growth during post deposition anneals can result in a decrease in the overall capacitance while a polycrystalline or phase-separated material could have excessive current leakage along grain boundaries. Hafnium oxide and hafnium silicate are two materials, which are predicted to be thermodynamically stable with silicon at 1000°C. We have deposited these materials using organometallic chemical vapor deposition with Hf (IV) t-butoxide and various oxygen atom sources including N2O and O2, as well as remote N2O and O2 plasmas. Rapid thermal annealing experiments were performed in Ar, O2 and N2 ambients up to 1000°C. Thin film stability was examined using XPS, Fourier transfer infrared spectroscopy and X-ray diffraction measurements.
DI1-MoP-3 A Study of MOS Characteristics of Reoxidized HfO2 Thin Film for Gate Oxide Applications
H.-J. Choi, D.W. Lee, J.-H. Yoo, S.-W. Nam, D.-H. Ko (Yonsei University, Korea); J.-H. Ku (R&D Center Semiconductor Samsung Electronics Co.); M.-H. Cho (Yonsei University, Korea); S. Choi (R&D Center Semiconductor Samsung Electronics Co.); C.-W. Yang (Sungkyunkwan University, Korea)
We investigated the change of the microstructure which depend on the thickness of Hf films deposited by DC magnetron sputtering on Si substrate for gate dielectric application. Also, we estimated the electrical property and the microstructure of the interlayer between the thin HfO2 films and Pt and Al gate electrode. The Hf films reoxidized by the RTP(rapid thermal processing) were analyzed by spectroscopic ellipsometry, AFM, XRD, XPS, and HR-TEM. We observed small grains of the HfO2 film due to the local crystallization of the as-deposited Hf film ~90Å by HR-TEM. The thickness of the interfacial layer between hafnium oxide and Si substrate was about 8Å. After RTP treatment at 800°C in N2 ambient, the thickness of interfacial layer was equal to that of as-deposited film. For 500Å thick as-deposited Hf film, the HfO2 layer at the surface was observed about 55Å by HR-TEM. The HfO2 layer increased to be 90Å at 800°C in N2 ambient. Especially, the HfO2 grains were shown not only at the surface of the Hf film but also at the silicide(Hf5Si4) grain boundaries. And the buckling of the silicide film on the Si substrate was locally observed due to the stress generated during the silicide and hafnium dioxide formation. XRD peaks indicated the formation of silicide after RTP treatment over 700°C. We evaluated C-V and I-V of the MOSCAP structures in the Pt/Hf(~100Å)/Si and Al/Hf(~100Å)/Si , and it demonstrated that the capacitance and the leakage current level of the MOS structures were changed upon the temperature of RTP treatments.
DI1-MoP-4 Investigation of Tungsten Silicide Gate for the Integration with High-k Hafnium Oxide (HfO2) in Metal-Oxide-Semiconductor Devices
K. Roh, S. Yang, H. Kang, Y. Roh, G. Bae, D. Jung, N.-E. Lee, C.-W. Yang (Sungkyunkwan University, Korea)
Sub-0.1 µm MOSFETs face a scaling limit when a SiO2 gate dielectric is used due to high direct tunneling leakage current. Recently, many high-k gate dielectrics such as Al2O3, Y2O3, ZrO2, HfO2 and their stacks have been studied extensively to replace thermal SiO2. Among those dielectrics, Hafnium oxide and their silicates have been suggested as a strong candidate for the alternate gate oxides. In this work, we report the structural and electrical properties of HfO2 films with tungsten silicide (WSi2) as a metal gate. The samples were fabricated on 4-in n- and p-type (100) wafers with 4~7 Ωcm resistivity. Hf films were deposited using rf reactive magnetron sputtering method from 99.5 % Hf target on the Si wafers, and were thermally oxidized in furnace at 500 °C. Annealing of the formed HfO2 in furnace at 500 °C was then followed. During sputtering, the gas pressure and rf power were 10 mTorr and 50 W, respectively. Tungsten silicide films for gate electrode were deposited directly on the HfO2 films in a cold-wall low pressure chemical vapor deposition system with the thickness of 500 ~ 1500 Å. For electrical characterization, the WSi2/HfO2/Si MOS capacitors were. Additional annealing was carried out at various conditions to minimize the resistance of WSi2 and etching damage. The hysteresis of the WSi2/HfO2/Si MOS capacitors before and after annealing was negligible (<10 mV); it was independent on frequencies from 10 kHz to 1 MHz and on bias ramp rates from 10 mV to 1 V. Gate depletion effect was not also observed. After furnace annealing of the WSi2/HfO2/Si MOS capacitors at 500 °C, EOT (equivalent oxide thickness) was reduced from 26 to 22 Å. In addition, the leakage current was 1x10-5 A at 1 V after annealing, which is reduced by approximately one order as compared to that measured before annealing.
DI1-MoP-5 Annealing Effects on Optical Properties of Hafnium Oxide Films Observed by Spectroscopic Ellipsometry
Y.J. Cho, N.V. Nguyen, C.A. Richter, J.R. Ehrstein (National Institute of Standards and Technology)
We have applied spectroscopic ellipsometry (SE) to investigate a set of HfO2 films and correlate their optical properties with fabrication processes, in particular, with high temperature annealing. Among the many proposed high-k dielectrics such as HfO2, Ta2O5, TiO2, and ZrO2, the use of HfO2 films as the replacement for SiO2 as the gate dielectric in CMOS devices has received much attention recently due to its high dielectric constant, low leakage current, good thermal stability, and interface characteristics comparable to silicon dioxide/silicon interface. In spite of these promising properties, little is known about the optical properties of HfO2. Thin HfO2 films were grown on Si substrate by dc magnetron sputtering and then annealed at high temperatures. SE measurements were performed on a high-accuracy custom-made spectroscopic ellipsometer. The dielectric functions of these films were determined by inversions of SE data and compared with the results with those obtained by using a Tauc-Lorentz (TL) dispersion function. It will be shown that, in the near-IR-visible-UV spectral range, TL can be used to effectively describe the optical properties of HfO2. From the characteristics found in the pseudo-dielectric functions or the TL dispersions, when the annealing temperatures increase from 500 to 700 °C, we observed that, for the HfO2 films, the optical band gap increases. In addition, for samples annealed at 600 °C and above, new optical features, which are not present at lower temperature, are clearly seen in their dielectric functions. These features are the signature of poly-crystallization in the film attributable to the annealing. As a result, we conclude that SE can easily and quickly identify the onset or the existence of crystalline HfO2 films without employing a more elaborate and destructive method such as a transmission-electron microscope (TEM).
DI1-MoP-6 Physical and Electrical Characteristics of W-TiN/HfO2/Si (MOS) Devices
S. Yang, K. Roh, H. Kang, Y. Roh, K. Kim, N.-E. Lee (Sungkyunkwan University, Korea)
Recently, the metal/high-k oxide structures have been investigated extensively to implement sub-100 nm MOSFETs technology. In this work, we present the physical and electrical characteristics of MOS capacitors with HfO2 gate dielectric and W/TiN gate electrode. The Hf thin films were deposited directly on n-type silicon substrate by a RF magnetron sputtering method. The HfO2 films with thicknesses of 6-7 nm were formed by a thermal oxidation of Hf thin film in O2 ambient at 500 °C for 120 min in furnace. The annealing of the HfO2 films was then carried out in N2 ambient at 500 °C for 60 min in furnace. TiN films (30 nm) were deposited on HfO2 by a DC reactive sputtering method followed by W deposition (200 nm) using LPCVD. For some samples, only the W films were deposited on HfO2 films to investigate the roles of the TiN films. The sheet resistance of W/TiN was ~ 4 Ω/square. The intermediate layer between gate dielectric and Si was observed by TEM, which is believed to be a hafnium silicate (HfSixOy) layer. To evaluate the EOT and leakage current characteristics, the C-V and I-V measurements of MOS capacitors with different gate electrode (i.e., W/TiN, W and Pt gate) were performed. The hysteresis of W/TiN gate was negligible (<10 mV) in contrast to that of the Pt gate devices which showed a high value of the hysteresis (>100 mV) due to gate dielectric damage during sputtering deposition. The EOT of W/TiN/HfO2 MOS capacitors was 1.9 nm based on the C-V measurement. In addition, as compared to the results obtained from the W/HfO2/Si MOS structures, the W/TiN/HfO2/Si MOS capacitors showed an excellent current-voltage characteristics: The leakage current was ~2x10-5 A/cm2 at 2 V which is lower than published results reported by other researchers at the same EOT.
DI1-MoP-7 Characteristics of HfO2/HfSixOy Film as an Alternative Gate Dielectric in Metal-Oxide-Semiconductor Devices
H. Kang, Y. Roh, G. Bae, D. Jung, C.-W. Yang (Sungkyunkwan University, Korea)
Recently, research efforts on high-k gate oxides have been focused on materials such as HfO2, ZrO2, and their silicates due to their excellent electrical properties. In particular, the HfO2/HfSixOy gate-oxide produces the excellent interfacial properties between HfSixOy and Si, while the effective dielectric constant can be further increased by forming the HfO2 layer on HfSixOy. In this work, we investigated the physical and electrical properties of the HfO2/HfSixOy prepared by a simple method; that is, the oxidation of sputtered Hf metal films on Si followed by N2 annealing. Thin Hf layers were directly deposited on Si substrate by sputtering. The oxidation and annealing were performed at 500 °C for 120 min and in N2 ambient at 500 °C for 60 min in furnace, respectively. Al gate was thermally evaporated on the HfO2 film using a shadow mask. Using the TEM, AES, and XPS techniques, we confirmed that the oxidation of the thin Hf films on Si results in a HfO2/HfSixOy stack layer. In addition, the thickness of an amorphous HfSixOy layer (HfO2 layer) reduces (increases) after the post-oxidation annealing in N2 ambient, which causes the increase of the effective dielectric constant. The hysteresis window and the interface state density of HfO2/HfSixOy were less than 10 mV and ~3x1011 /cm2 eV without PMA, respectively. The leakage current was also low (1x10–5 A/cm2 at 2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfSixOy buffer layer. We also found that the degradation of HfO2/HfSixOy gate oxides is more severe when electrons were injected from the gate electrode.
DI1-MoP-8 Interface Formation and Electrical Properties of TiNx (Titanium Nitride)/HfO2/Si Structure for Application in Gate Electrode
Y.S. Ahn, K.J. Kim, S.H. Ban, N.-E. Lee, S. Yang, K. Roh, Y.H. Roh (Sungkyunkwan University, Korea)
Recent extensive research activities on HfO2 as a high-k gate dielectric material are focused on the layer formation and interfacial properties between HfO2 and Si substrate. For the integration of HfO2 in MOS structures, metals as gate electrode materials are expected to be required. One of candidates for metal gate electrode is CVD tungsten. For application of CVD-W as a gate electrode, a diffusion barrier such as TiNx are often necessary to avoid the chemical etching of gate dielectrics by F atoms in the CVD precursor gas, WF6, resulting in increased leakage current. In this work, interface formation and electrical properties between TiNx and HfO2 for application of gate electrode were investigated as a function of annealing temperature. Hf layers were deposited on n-type Si(001) using rf magnetron sputter deposition. HfO2 layers of 6-7 nm thickness were formed at 500 °C by a thermal oxidation of the Hf layers for 120 min in furnace with O2 ambient. Further thermal annealing at 500 °C in N2 ambient for 60 min was carried out in order to reduce the fraction of silicate glasses formed. Then, TiNx layers of 100 nm were deposited at room-temperature by reactive d.c magnetron sputtering using Ar and N2 mixed in flow ratios of 6:1 and 6:3 at the working pressure of 4x10-3 Torr and at the source power of 100 W. Phase identification of TiNx layers before and after thermal annealing of TiNx/HfO2/Si at 650, 750, and 850°C in furnace, respectively, was carried out by XRD. Depth profiling analysis of Ti, Si, Hf, N, and O element for TiNx/HfO2/Si structure was performed by Auger electron spectroscopy (AES). Sheet resistances of TiNx/HfO2/Si systems were measured by a four-point probe. The interfacial reaction of TiNx/HfO2 will be discussed by measuring the chemical binding states at the interface using XPS.
DI1-MoP-9 Deposition and Characterization of Thin ZrO2 Films
L. Koltunski, R.A.B. Devine, R. Marquardt (University of New Mexico)
Amorphous films of ZrO2 up to ~ 100 nm thick have been deposited on Si substrates at room temperature using O2 and Zr(C4H9O)4 source gases in an electron cyclotron resonance excited plasma enhanced chemical vapor deposition reactor working in the pressure range ~ 2 millitorr. The film composition was measured by X-ray emission and found to be stoichiometric (ZrO2) within experimental error. The refractive index at 632.8 nm was ~ 1.74 - 1.84 whilst the dielectric constant, measured on metal-oxide-semiconductor capacitor structures, was ~ 20. Glancing incidence X-ray scattering was used to ascertain the film density which was ~ 5 g cm-3 as compared to a monoclinic, crystalline value ~ 5.83 g cm-3. Infrared absorption spectroscopy of the amorphous films evidenced a strong transverse optic mode at 410 cm-1 and an associated longitudinal optic mode at 693 cm-1. From the transverse/longitudinal optic mode splitting we determine that the dielectric constant is > 11. Since the experimental value is ~ 20 other transverse/longitudinal modes must be present but not observed in the spectral range we have examined (350 - 1600 cm-1). Evidence for crystalline phases (monoclinic and tetragonal) was found in the infrared spectra of samples deposited using radio frequency substrate bias. The presence of crystalline inclusions was confirmed by X-ray scattering analysis. The amorphous film dielectric constant is only ~ 9% smaller than the crystalline value (~22) whereas the refractive index is smaller by 16-21 %. The origin of these differences will be discussed.
DI1-MoP-10 Material and Electrical Characteristics of ZrO2 Film Obtained by Electron Cyclotron Resonance Plasma Enhanced Chemical Vapor Deposition (ECR-PECVD)
B.O. Cho, J. Wang, S.X. Lao, J.P. Chang (University of California, Los Angeles)
ZrO2 is investigated in this work to replace SiO2 as the dielectric material in metal-oxide-metal (MOM) capacitors in dynamic random memory (DRAM) devices for its high dielectric constant, good thermal stability, excellent conformality, and large bandgap. ZrO2 films were deposited on p-Si (100) wafers by ECR-PECVD method using zirconium tetra-tert-butoxide (Zr(OC4H9)4) as an organometallic precursor, Ar as a carrier of the precursor vapor, and O2 as an oxidant. X-ray photoelectron spectroscopy and secondary ion mass spectrometry indicated that stoichiometric ZrO2 film was obtained with various amount of carbon incorporation depending upon the electron temperature and the O2/Ar flow rate ratio. X-ray diffraction showed that the films deposited without substrate heating were amorphous. By manipulating the negative substrate bias and raised the deposition temperature to around 400 °C, carbon-free amorphous ZrO2 was obtained. High resolution transmission electron microscopy was used to observe the interfacial thin film formation between the deposited ZrO2 and the substrate Si. The electrical property of the as deposited ZrO2 was assessed by forming Al/ZrO2/Si capacitor structures. Good capacitance-voltage and current-voltage characteristics were obtained with k=22 at 1 MHz and J=4x10-5 A/cm2 at -1.5 V, respectively. The C-V response showed a small hysteresis of <60 mV and an interfacial state density of 2x1011 cm-2 eV-1 based on capacitance measurement at various frequencies. The influences of carbon incorporation, substrate heating and biasing, and post-annealing on the bulk and the interfacial trap formation were investigated by photoconductivity measurement, which enables the determination of leakage conduction mechanism.
DI1-MoP-11 Characteristics of Zirconium Oxide with Different Gate Electrodes
S.-W. Nam, J.-H. Yoo, D.W. Lee, D.-H. Ko (Yonsei University, Korea); J.-H. Ku (Samsung Electronics Co., Korea); M.-H. Cho (Yonsei University, Korea); S. Choi (Samsung Electronics Co., Korea); C.-W. Yang (Sungkyunkwan University, Korea)
MOS devices are being continuously scaled, especially the gate oxide thickness and the source/drain junction depth. Key process issues in conventional SiO2 scaling are with the gate stack, including boron penetration and gate leakage for very thin gate oxides and depletion effects in the polysilicon electrodes. The solution is to use a gate dielectric with a higher dielectric constant than that of SiO2. Together with a high-K dielectric, dual metal gate may be implemented to enable the scaling of MOS devices. We investigated the electrical properties and thermal stability on sputtered ZrO2 films with various electrodes for p-type silicon substrate. ZrO2 thin films as a gate dielectric were deposited by reactive dc magnetron sputtering, followed by thermal annealing in either O2 or N2 using furnace. And then various metals such as Al, Pt, TiN, TiN/Al, and TiN/Pt were deposited by sputtering as a gate electrode. Also, conventional poly-Si and poly-SiGe as a gate electrode were deposited by chemical vapor deposition. By HRTEM and XPS analyses, we evaluated compatibility and thermal stability between the ZrO2 films and electrodes. We focused on the interfacial layer between high-k dielectric and electrodes. In comparison with Pt electrode, the accumulation capacitance of the MOS with Al electrode demonstrated about 8% degradation. And we compared electrical characteristics of Al (or TiN/Al) and Pt (or TiN/Pt) with other well-known gate electrodes such as poly-Si and poly-SiGe.
DI1-MoP-12 Diffusion Studies of High k Gate Dielectric Candidates Hafnium and Zirconium Silicates into Si
M.A. Quevedo-Lopez, M. El-Bouanani, S. Addepalli, C. Huang, J.L. Duggan, B.E. Gnade, R.M. Wallace (University of North Texas); L Colombo, M. Bevan, M. Douglas, M. Visokay (Texas Instruments Inc.)
The area of advanced gate dielectrics has gained considerable attention recently because the SIA technology roadmap predicts the need for a <2.0 nm SiO2 gate dielectric for sub-0.13 mm scaled silicon CMOS.1 Desirable properties for new gate dielectrics include; higher permittivity (κ) than SiO2 (κ = 3.9), minimal reaction barrier, thermodynamic stability in direct contact with silicon, low leakage current (<1 A/cm2 at 1V), and very low diffusion into silicon. Considering these requirements, Hf silicate and Zr silicate have been proposed as suitable candidates for advanced gate dielectric applications.2,3 However, more issues have to be resolved. Among those issues metal diffusion (Zr, Hf) into the channel is critical because impurity diffusion from the gate dielectric into the channel region would likely result in deleterious effects on carrier mobility. We have studied the diffusion of Hf and Zr from high-κ gate dielectric candidates HfSixOy and ZrSixOy. The studies were carried out after aggressive thermal annealing followed by chemical etching. The annealed/etched films were studied using monochromatic X-ray Photoelectron Spectroscopy (XPS), Time-of-Flight Secondary Ion Mass Spectrometry (ToF-SIMS), High resolution TEM, and Rutherford Backscattering Spectrometry (RBS). Film deposition, chemical etching and characterization issues are discussed. No detectible Hf diffusion into Si from RTP and furnace-annealed films is observed. In contrast Zr diffusion is observed upon RTP and furnace anneals. Implications for high-k gate dielectric applications are also discussed. This work was supported by the Texas Advanced Technology Program, the Semiconductor Research Corporation, and DARPA.


1Semiconductor Industry Association roadmap 1999
2G.D. Wilk and R.M. Wallace, Appl. Phys. Lett. 74, 2854 (1999).
3G.D. Wilk and R.M. Wallace, Appl. Phys. Lett. 76, 112 2000).
4W.-J. Qi, et al., Appl. Phys. Lett. 77, 1704 (2000).

DI1-MoP-13 High-dielectric Constant Aluminum Oxide Films
C. Falcony (CINVESTAV and ESFM-IPN, Mexico); M. Aguilar-Frutis (CICATA-IPN, Mexico); J. Guzman (CICATA-IPN, IIM-UNAM, Mexico); M. Garcia (IIM-UNAM, Mexico)
Aluminum oxide films deposited by Spray Pyrolysis at low temperatures ( 450 to 650°C ) have been studied as high-K dielectric layers on silicon. Dielectric constants in the range of 6.7 to 8.5 and interface states in the order of 1011 at midgap have been obtained. Overall optical, electrical, and structural characteristics are strongly dependent on the deposition parameters, as well as the presence of carbon as impurity. Dielectric breakdown for these films is larger than 5 MV/cm.The electrical conduction mechanisms are discussed.
DI1-MoP-14 UHV-CVD of Al2O3 for Gate Dielectric Applications
B.R. Rogers, Z. Song, R.D. Geil, T.P. Hanusa, R.A. Weller (Vanderbilt University)
Successful replacement of silicon dioxide-based MOSFET gate dielectrics by a high-permittivity (high-k) dielectric is a critical step in the continued drive to build the smaller, faster, lower-power, more-integrated circuits that society is demanding. Our goal toward this effort is to develop a thermodynamically and microstructurally stable, amorphous material system, having no interfacial silicon dioxide formation. In this presentation we will discuss our work on developing alumina/zirconia alloys for use as gate dielectrics. We have begun this effort by studying the deposition of alumina films in an ultra-high-vacuum chemical vapor deposition (UHV-CVD) system. We use a precursor of a mixed alkyl alkoxide aluminum dimer. This compound contains triethyl (tri-sec-butoxy) dialuminum, tetraethyl (di-sec-butoxy) dialuminum, and diethyl (tetra-sec-butoxy) dialuminum. This mixture is non-pyrophoric and is less susceptible to hydrolysis than other tialkoxide aluminums. Our studies have included total deposition pressures between 10-5 and 10-3 torr, and substrate temperatures between 350 and 500 °C. In addition we will discuss the characterization of these films using time-of-flight medium energy ion scattering (ToF-MEIS), a characterization capability unique to Vanderbilt University. .

This work is supported by the National Science Foundation grant # CTS-0092792.

DI1-MoP-15 Annealing Effects of Al2O3 Films Grown on Si(100)
Y.S. Roh, M.-H. Cho, Y.K. Kim, S.A. Park, D.-H. Ko, C.N. Whang, K.H. Jeoung (Yonsei University, Korea)
The annealing effects of the thin Al2O3 films grown on Si(100) by sputtering method was deeply investigated using various physical and electrical measurement methods. All the films grown in the temperature below 300°C using sputtering Al2O3 target showed amorphous structure as examined by x-ray diffraction and transmission electron microscopy. The amorphous structure was maintained up to 600°C and then transformed to γ-Al2O3 phase above the annealing temperature of 600°C . In particular, the characteristics of the leakage current density in MOS structure depended on the annealing temperature. The densification of the film due to the crystallization resulted in improved electrical characteristics; the crystallization enhanced the improvement of the dielectricity and breakdown field strength. Moreover, the depth profiling data using XPS showed that the improvement of the leakage properties in Al2O3 film closely related with the change of interfacial layer under the high temperature annealing. In particular, the fixed trap density was increased even after the annealing process, which resulted from the difference of the chemical state of the Al2O3 film along with the structural change.
DI1-MoP-16 Studies on Ta2O5 Thin Films Deposited on Si(100) by MOCVD and Sputtering Techniques
P. Passacantando, L. Lozzi, V. Salerni, P. Picozzi, S. Santucci (University of L'Aquila, Italy)
Tantalum oxide is one of the most promising dielectric materials to be used for high performance in integrated circuits and electronic packaging applications. In this work stoichiometric Ta2O5 thin films have been successfully grown on Si(100) substrate by metal-organic chemical vapor deposition (CVD) technique using tantalum ethoxide (Ta(OC2H5)5) as precursor and by DC sputtering in reactive Ar/O2 atmosphere. The growth rate, the stoichiometry, the surface morphology and the structural properties of the films growth with and without nitrogen passivation of the silicon substrate, have been studied by X-Ray Reflectivity (XRR), X-ray Photoelectron spectroscopy (XPS), Atomic Force Microscopy (AFM) and X-ray Diffraction (XRD). We observed how the formation of a SiO2 layer between the silicon substrate and the Ta2O5 deposited film is nearly totally inhibited by a pre-treatment at 750°C in NH3 flux of the H-terminated silicon surface before the Ta2O5 deposition. Furthermore, we observed that a post growth annealing in a O2/N2 mixture up to 850°C determines a lowering of the leakage current whose dominating mechanism has been attributed to trap assisted Frenkel-Poole emission.
DI1-MoP-17 Microstructure of BaTiO3 Films Prepared by Electrochemical Depostion on Ti-Coated Silicon Substrates
C.-T. Wu, F.-H. Lu (National Chung Hsing University, Taiwan)
Crystalline BaTiO3 films were directly synthesized onto Ti-coated silicon substrates in highly alkaline condition at 55°C using Ba(OH)2 or Ba(CH3COO)2 as electrolyte. Titanium films were first deposited by Filtered Cathodic Arc Deposition (FCAD) of varying thickness about 0.2 µm, 2µm and 5µm onto silicon wafer. The electric charge of electrolysis was carefully controlled to grow appropriate thickness of BaTiO3 films by applying a anodic oxidation method. From previous studies using pure Ti plates as substrates, we prepared the films by the potentiodynamic method to the preset voltages. X-ray diffraction results showed cubic BaTiO3 phase could be present at low electrolytic voltage of 3 V and higher voltage of 75 V. The BaTiO3 films synthesized at 3 V develops uniformly distributed spherical like small particles, and crater-shaped and large-grained BaTiO3 films were observed at 75 V. The great differences of morphology between these two electrolytic conditions were also verified by surface roughness measurements. SEM/EDS, AES and XPS were used to analyze the composition of BaTiO3 films. The growth mechanisms of BaTiO3 films were also discussed.
DI1-MoP-18 Electrical Properties of BST Thin Films on Si Substrates
N.A. Suvorova, A.H. Mueller, E.A. Irene (University of North Carolina, Chapel Hill); O. Auciello (Argonne National Laboratory); J.A. Schultz (Ionwerks, Inc.)
Among many materials with high dielectric constant for use in advanced MOSFET's, Ba0.5√sub 0.5TiO3 (BST) is one of the most promising candidates, since it has a static dielectric constant over 300 for bulk material. However, BST thin films always exhibit much lower dielectric constant. The formation of interfacial layers between BST and Si substrate results in reduction of the overall dielectric constant that dramatically decreases the capacitance of the stack. Our BST thin films studies1 have included in-situ real time material characterisation as well as ex-situ material and electronic characterizations. The present study focuses on electronic characterization of Al/BST/p-Si and Ir/BST/p-Si structures with and without intervening SiO2 layers between BST and Si substrate. Among the electronic measurements included are the dielectric constant and leakage current of the BST thin films as well as interface charges. Attepmts will be made to correlate the electronic properties with the material characteristics that will be presented separately.1


1 A.H. Mueller, N.A. Suvorova, E.A. Irene, O. Auciello, and J.A. Schultz. In-situ, real time studies of interface formation of BST thin films on Si substrates. Present Conference Proceedings.

DI1-MoP-19 Thermal Decompostion Mechanisms of (Ba,Sr)TiO3 Film Precursors
J.P. Senosiain, C.B. Musgrave (Stanford University)
Next-generation memory devices will require high-permittivity dielectric materials able to handle sufficient charge as the dimensions of memory cells continue to scale down. Barium strontium titanate (BSTO) is a strong candidate for such applications, with a dielectric constant many times higher than that of the presently used silicon oxy-nitrides. To grow BSTO thin films effectively, a basic understanding of the precursor chemistry and deposition mechanism is needed, yet the literature in this areas is quite scarce. We have employed Density Functional Theory (DFT) and pseudopotential basis sets to study the thermal decomposition mechanisms of the β-diketonate precursors: Ba(thd)2, Sr(thd)2 and Ti(OH)2(thd)2. In all these species, we find the metal-oxygen bond to be the weakest and thus the first to be broken. The cleavage of a second metal-oxygen bond leads to considerable geometric rearrangement and is energetically favourable. This is followed by the detachment of tert-butyl radicals and possible ring-closing reactions. Other decomposition channels, as well as their implications to the deposition process, are discussed in terms of their thermochemistry.
DI1-MoP-20 Enhancement of Etching Characteristics of (Ba,Sr)TiO3 Using Magnetically Enhanced Inductively Coupled CF4/Ar Plasma
D.P. Kim, C.I. Kim (Chung-Ang University, Korea); T.H. Kim (Yeojoo Institute of Technology, Korea); Y.J. Seo (Daebul University, Korea); E.H. Kim (Cheju National University, Korea); E.G. Chang (Chung-Ang University, Korea)
Now, three major trends in IC device fabrication are putting more functions on individual chips, fabricating faster chips, and lowering IC fabrication costs. Smaller memory cell increases its speed with using other materials sets like metal gates and electrodes, and high-k dielectrics. Ferroelectric (Ba,Sr)TiO3 (BST) thin film have been attractive for advanced dynamic random access memories (DRAMs) applications due to its high dielectric constant. The smaller features need better plasma-etching processes to ensure etch fidelity and new features. Because the etch rate of BST thin film is low in a reactive ion etcher and an inductively coupled plasma etcher, magnetically enhanced inductively coupled plasma (MEICP) was used. Plasma density of MEICP is higher than that of RIE and ICP. In this study, BST thin films were etched in CF4/Ar. The experiments were carried out with measuring etch rates and selectivity as a function of gas mixing ratio, rf power, dc bias voltage and chamber pressure. The maximum etch rate of BST thin film was 1800 Å/min at CF4(10)/Ar(90), rf power of 600W, dc voltage of -300V, and chamber pressure of 5 mTorr. The selectivities of BST to Pt and photoresist were 0.6 and 0.7, respectively. The chemical states on the etched surface were investigated with x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS). Atomic force microscopy (AFM) and scanning electron microscopy (SEM) were used to investigate the surface morphology of BST thin films exposed in plasma. X-ray diffraction (XRD) was evaluated to investigate physical properties of BST before and after etching process. Electrical property was characterized by measuring leakage current.
DI1-MoP-21 Structural and Microwave Properties of Artificial BaTiO3/SrTiO3 Superlattice on MgO and SrTiO3 Substrate by Pulsed Laser Deposition
J.H. Kim, L. Kim, Y.N. Kim, D. Jung, Y.S. Kim, J. Lee (Sungkyunkwan University, Korea)
BaTiO3 (BTO)/SrTiO3 (STO) superlattice has been deposited on MgO and STO substrates by pulsed laser deposition (PLD). BTO/STO superlattice has an epitaxial layer of BTO and STO with the parallel crystallographic orientation to MgO or STO substrates. The periodicity of the BTO/STO superlattice was varied from 0.8 nm thickness to 50 nm and the total thickness of the superlattice was fixed at 100 nm. Structural properties of the superlattice with various periods were examined by X-ray diffraction (XRD) and high resolution transmission electron microscopy (HRTEM). This superlattice exhibited ferroelectricity in capacitance-voltage (C-V) characteristics, i.e., inverted butterfly hysteresis loop. Asymmetric behavior in C-V characteristics were also observed in the superlattice, which had different bottom and top electrodes each other. For microwave applications, the voltage tunability in the C-V characteristics was measured. The voltage tunability increased with decreasing the period of the superlattice. The tunability reached 90 % at the period of 2 nm. The tunability of BTO/STO superlattice was discussed in terms of periodicity and strain relaxation.
DI1-MoP-22 Ferroelectric PMNT Thin Films Deposited on TiN:O2 by Laser Ablation
J.M. Siqueiros (UNAM, Mexico); A. Fundora, J. Portelles (Universidad de La Habana, Cuba)
Pb(Mg1/3Nb2/3)0.9Ti0.1O3 (PMNT) polycrystalline thin films were deposited on TiN/Si substrates at different temperatures by laser ablation, using a wavelength of 248 nm, 30 ns pulse duration, 10 Hz repetition rate and a fluence of 2 J/cm2. As a result of this previous study, it was determined that deposits at 250 0C in a 200 mTorr oxygen atmosphere gave the best results with a post annealing treatment at 500 0C where a PMNT perovskite single phase formation was confirmed by x-ray diffraction (XRD) analysis. Higher and lower annealing temperatures presented a secondary pyrochlore phase. The electrical properties and the influence of the annealing temperature on the dielectric properties of the PMNT thin films were characterized through P-E hysteresis. Fatigue measurements were used to evaluate the long-term performance of the PMNT/TiN/Si system. The characteristics of the TiN films used as bottom electrodes were evaluated using Auger Electron Spectroscopy (AES) and Transmission Electron Microscopy (TEM) with particular emphasis in the interfaces. 1 This work has been partially supported by CoNaCyT-Mexico, through grant No. 33586E and by DGAPA-UNAM grant No. IN104000. The technical support by I. Gradilla, E. Aparicio, V. Garcia and F. Ruiz is acknowledged.
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